Manuel Lauss <[EMAIL PROTECTED]> writes:
> On Sun, Nov 23, 2008 at 05:14:27PM +, Richard Sandiford wrote:
>> Richard Sandiford <[EMAIL PROTECTED]> writes:
>> > Manuel Lauss <[EMAIL PROTECTED]> writes:
>> >> Admittedly my understanding of mips assembly is not yet very advanced, am
>> >> I
>> >>
Hello Richard,
On Sun, Nov 23, 2008 at 05:14:27PM +, Richard Sandiford wrote:
> Richard Sandiford <[EMAIL PROTECTED]> writes:
> > Manuel Lauss <[EMAIL PROTECTED]> writes:
> >> Admittedly my understanding of mips assembly is not yet very advanced, am I
> >> missing something or is this a bug?
>
Richard Sandiford <[EMAIL PROTECTED]> writes:
> Manuel Lauss <[EMAIL PROTECTED]> writes:
>> Admittedly my understanding of mips assembly is not yet very advanced, am I
>> missing something or is this a bug?
>
> Well, it's a missed optimisation, certainly. Fortunately,
> it's conceptually fairly ea
Manuel Lauss <[EMAIL PROTECTED]> writes:
> Admittedly my understanding of mips assembly is not yet very advanced, am I
> missing something or is this a bug?
Well, it's a missed optimisation, certainly. Fortunately,
it's conceptually fairly easy to fix. I'll have a go.
Richard
Hello,
Please consider this little snippett of code:
- 8< -- 8< --
#define AU1000_INTC0_INT_BASE 8
#define IC0_FALLINGCLR 0xb0400078
#define IC0_RISINGCLR 0xb040007c
static inline void au_writel(unsigned long d, unsigned long a)
{
*(unsigned long *)(a) =
