A New Architecture

2005-10-11 Thread ibanez
I just finish porting gcc to our new architecture: S+core Both gcc & g++ & libstdc++ are successfully build. But I have problem in testing, though I've pass lot's of informal C test patterns which my partner scratched from the internet. The GCC testing framework is so complicated t

compile error for 990203-1.c

2005-08-22 Thread ibanez
I'm porting a back-end for gcc. My back-end crached in the compile test pattern 990203-1.c, and the error message is main.c:7: internal compiler error: in purge_addressof, at function.c:3423 for (insn = insns; insn; insn = NEXT_INSN (insn)) if (INSN_P (insn)) { if (! pu

Re: does the instruction combiner regards (foo & 0xff) as a special case?

2005-08-02 Thread ibanez
You are cool, now I found a (set (reg:CC_Z 33 cc) (compare:CC_Z (zero_extend:SI (subreg:QI (reg/v:SI 166 [ a ]) 0)) (const_int 0 [0x0]))) It's what I'm looking for. Thank you so much.

Re: does the instruction combiner regards (foo & 0xff) as a special case?

2005-08-01 Thread ibanez
sorry to Ian for replying to the wrong address :) The result after instruction combination is in *.20.combine but the rtl pattern *.19.life in 1.) if(foo & 0x1ff) 2.) if(foo & 0xff) are almost the same I mean the debugging dump only shows the "input" and "output" of the combination. But w

does the instruction combiner regards (foo & 0xff) as a special case?

2005-07-31 Thread ibanez
Does the instruction combiner regards (foo & 0xff) as a special case? I have two patterns which I expect to match all the if(foo & $(constant)) patterns. They are [(set (reg:CC_Z CC_REGNUM) (compare:CC_Z (and:SI (match_operand:SI 0 "register_operand" "")

Backend: combine compare & arithmetic instructions

2005-07-18 Thread ibanez
Thank you for so much help. Now I can successfully combine a arith instrucion & compare. But another problem occurs, that is our RISC machine has logical instructions which only update the Zero flag. Thus only eq & neq branch can be combined with. For example case 1 (can combine) or_c

addsi3 with set condition register

2005-07-14 Thread ibanez
I'm writing a gcc back-end for a new RISC. This RISC has two kinds of add instructions, one updates condition register and one doesn't. ex. 1.) add <- add comp<- update condition register 2.) add_c <- add & update condition register But case 2 pattern is not used at al

The tree API

2005-06-16 Thread ibanez
Hello~ every one :) I'm a new guy in gcc mailing list I've been studying gcc for 2 months. I read "GNU compiler collection internals" (for GCC 3.5.0?), and I also trace the source code for target-mips. My problem is there are so much symbol/function/API in gcc. Some are documentated in the boo

About macro: SYMBOL_REF_SMALL_P

2005-06-14 Thread ibanez
I'm trying to trace the source code of gcc/mips. It uses a SYMBOL_REF_SMALL_P macro, According to the index of 'GNU Compiler Collection Internals', it should be documented on section RTL representation-Access to Special Operands but it's not. How can I find it's document? My english is very po