Hi,
Thanks very much for your help. I have fixed the problem of the abs
insn with HI and QI mode as you advised.
Best regards
Maggie
ilson <[EMAIL PROTECTED]>:
Ying Yi wrote:
The generated codes do the following operations: 1) extend variable
a_HI (HImode) to temp variable SImode, and do abs operation with
SImode operators. I find the gimple intermedia represention as
shown below:
abs is a standard library fu
Hi all,
I have a problem with absm2 insn, my target machine can suppport abs
operation with QImode, HImode and SImode. I give machine description
in md file as below.
(define_mode_macro SHQ [SI HI QI])
(define_insn "abs2"
[(set (match_operand:SHQ 0 "register_operand" "=r")
Hi all,
From gcc documents, I know that if the condition code or comparison
result can be placed in any general register, or if there are multiple
condition registers, use a pseudo register. I want to use general
register, but I don't know how to do it. Could someone know that? And
show
Hi gcc group,
I added vector compare and mov insns in gcc for our architecture
(cross_gcc), but when I
use these insns in c, I have to use builtin functions instead of
generic vector compare.
for example:
typedef short int v2hi __attribute__ ((vector_size (4))); // vector of
two short
v
