eep up the good work!
Wolfgang Mües
Rask,
On Sunday 06 August 2006 02:05, Rask Ingemann Lambertsen wrote:
> Yes, it only cures the symptom, but it could take a lot of time to
> find the cause, and the gain is small, so I think it is OK to leave
> it like this for now.
OK.
> This insn was generated from the "reload_outqi" pattern. I
Rask,
On Friday 21 July 2006 15:26, Rask Ingemann Lambertsen wrote:
> I found that this peephole optimization improves the code a whole
> lot:
Done.
> Another way of improving the code was to swap the order of the two
> last alternatives of _arm_movqi_insn_swp.
Done.
Anyway, the problems with
Hello Rask,
On Wednesday 19 July 2006 13:24, Rask Ingemann Lambertsen wrote:
> I've spotted a function named emit_set_insn() in arm.c. It might be
> the problem, because it uses gen_rtx_SET() directly.
But it's not the only function which uses gen_rtx_SET. There are also
much places with
> e
Hello,
after getting a "working" version of the gcc 4.0.2 with the Nintendo
8-bit-write problem, I was busy the last weeks trying to adapt the
linux system (replacing I/O with writeb() macros, removing strb
assembler calls).
However, it turned out that the sources of the linux kernel are a far
Rask,
On Thursday 08 June 2006 20:12, Rask Ingemann Lambertsen wrote:
> Also, undo the change to arm_legitimate_address_p() arm.c.
Hmmm
> arm-elf-gcc -g -mswp-byte-writes -Wall -O2 -fomit-frame-pointer
> -ffast-math -mthumb-interwork -isystem
> /usr/lib/devkitpro/libnds/include -mcpu=arm9td
Rask,
On Tuesday 06 June 2006 21:33, Rask Ingemann Lambertsen wrote:
> > > + swp%?b\\t%1, %1, %0\;ldr%?b\\t%1, %0"
> >
> > You should get a price for cleverness here!
>
> Thanks! Indeed it looks good until you think of volatile variables.
Because volatile variables can change their values from
Rask,
On Monday 05 June 2006 16:16, Rask Ingemann Lambertsen wrote:
> On Mon, Jun 05, 2006 at 01:47:10PM +0200, Wolfgang Mües wrote:
> Does GCC happen to accept "[%r, #0]" for swp?
No. But no problem here to change that.
> I think the comment in arm.h is wrong. The manual
, #0]" was coded before, because the
assembler understands "[%r]" very well for all instructions. The form
"[%r]" has a wider usage because it covers swp too.
On Sunday 04 June 2006 23:36, Rask Ingemann Lambertsen wrote:
> On Wed, May 31, 2006 at 10:49:35PM +0200, Wolfgang Müe
Richard,
On Monday 05 June 2006 12:06, Richard Earnshaw wrote:
> I'm confident right now that these will be too invasive to include in
> mainline.
As said before, this is OK for me.
> The changes that tend to get incorporated into the compiler are to
> work around bugs in the CPU, not bugs in s
Hello Dave ;-)
On Monday 05 June 2006 02:12, Dave Murphy wrote:
> I was just about to ask about this very thing since I'm quite sure
> that there would be interest in adding this to devkitARM.
You are following the process in dslinux, don't you?
In fact, devkitARM is my current build environment
Paul,
On Sunday 04 June 2006 17:57, Paul Brook wrote:
> Because then you have several different patterns for the same
> operation. The different variants of movsi should be part of the same
> pattern so that the compiler can change its mind which variant it
> wants to use.
Together with the comme
Paul,
On Sunday 04 June 2006 13:24, Paul Brook wrote:
> On Sunday 04 June 2006 11:31, Wolfgang Mües wrote:
> > Splitting the insn
> >
> > (define_insn "*arm_movqi_insn"
> > [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m"
Hello Rask,
On Friday 02 June 2006 09:24, Rask Ingemann Lambertsen wrote:
> There may be a faster way of seeing if the modification is going to
> work for the DS at all. I noticed from the output template
> "swp%?b\\t%1, %1, [%M0]" that "swp" takes three operands. I don't
> know ARM assembler, but
Rask,
On Thursday 01 June 2006 16:13, Rask Ingemann Lambertsen wrote:
> I think you will need to remove the '+' as already suggested and add
> (clobber (match_scratch:QI "=X,X,X,1")) to tell GCC that the register
> allocated to operand 1 is clobbered by the instruction for this
> particular altern
Paul,
thank you for commenting...
On Tuesday 30 May 2006 22:03, Paul Brook wrote:
> > I found arm.md and the moveqi insns, but because of the different
> > addressing modes of strb and swpb, its not easy to make the change.
> > And there must be a compiler option for this, too.
> >
> > Could some
On Tuesday 30 May 2006 23:47, Daniel Jacobowitz wrote:
> On Tue, May 30, 2006 at 09:03:54PM +0100, Paul Brook wrote:
> > > I found arm.md and the moveqi insns, but because of the different
> > > addressing modes of strb and swpb, its not easy to make the
> > > change. And there must be a compiler o
Hello,
I am trying to port big C/C++ programs (see www.dslinux.org) to the
nintendo DS console.
The console has 4 Mbytes internal memory, and 32 MBytes external
memory which is *not* 8bit writable (only 16 and 32 bits). CPU is an ARM
946. Using the external memory for ROM(XIP) and the internal
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