Hi,
I am trying to use recog_data.operand in ASM_OUTPUT_OPCODE to access the
operands of the current insn for printing as the documentation for
ASM_OUTPUT_OPCODE suggests. However, this does not work for printing
inline assembly because asm insns are never matched. How can I
distinguish recogniz
> From: Dale Johannesen [mailto:[EMAIL PROTECTED]
>
> On Jul 21, 2005, at 5:04 PM, Tabony, Charles wrote:
>
> >> From: Dale Johannesen [mailto:[EMAIL PROTECTED]
> >>
> >> On Jul 21, 2005, at 4:36 PM, Tabony, Charles wrote:
> >>
> >>>
> From: Dale Johannesen [mailto:[EMAIL PROTECTED]
>
> On Jul 21, 2005, at 5:04 PM, Tabony, Charles wrote:
>
> >> From: Dale Johannesen [mailto:[EMAIL PROTECTED]
> >>
> >> On Jul 21, 2005, at 4:36 PM, Tabony, Charles wrote:
> >>
> >>>
> From: Dale Johannesen [mailto:[EMAIL PROTECTED]
>
> On Jul 21, 2005, at 4:36 PM, Tabony, Charles wrote:
>
> > Hi,
> >
> > I am working on a port for a processor that has 32 bit registers but
> > can
> > only load 16 bit immediates.
> > "
Hi,
I am working on a port for a processor that has 32 bit registers but can
only load 16 bit immediates. I have tried several ways to split moves
with larger immediates into two RTL insns. One is using a
define_expand:
-code---
(define_expand "movsi"
Hi,
I am trying to add instruction scheduling to a machine description. I
added everything I think I need and the .dfa looks right to me, but when
I compile with -fsched-verbose=10 I get something that looks like this:
;; ==
;; -- basic blo
Hi,
I am trying to separate move immediates that require more than 16 bits
into two instructions that set the high and low 16 bits of a register
respectively. Here is my define_expand:
(define_expand "movsi"
[(set (match_operand:SI 0 "nonimmediate_operand" "")
(match_operand:SI 1 "gene
