Re: Modifying RTL cost model to know about long-latency loads

Ahh I see, that makes a lot more sense. I’d want to change the TARGET_SCHED_ADJUST_PRIORITY hook? Also, would it still make sense to change the costs of expensive loads even during instruction selection to give opportunities for optimizations like rematerialization? I’m thinking that it could b

Re: Modifying RTL cost model to know about long-latency loads

that modifying the costs for integer multiplies in the riscv_tune_info structs didn’t affect the generated code. Could this be why? Thanks again! Sasha Krassovsky > On Apr 13, 2020, at 12:08 PM, Jim Wilson wrote: > > On Sat, Apr 11, 2020 at 4:28 PM Sasha Krassovsky via Gcc > w

Modifying RTL cost model to know about long-latency loads

Hello! I’m currently modifying the RISC-V backend for a manycore processor where each core is connected over a network. Each core has a local scratchpad memory, but can also read and write other cores’ scratchpads. I’d like to add an attribute to give a hint to the optimizer about which loads w