On May 13, 2009, at 4:51 AM, Duncan Sands wrote:
Hi,
Sorry, I missed to mention that I used an additional option -mpc64
for
32-bit GCC4.4. It is not possible to generate SPECFP2000 expected
results by GCC4.4 without this option. LLVM does not support this
option. And this option can sign
Cmode)
&& ix86_binary_operator_ok (MINUS, SImode, operands)"
"sub{l}\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
(set_attr "mode" "SI")])
But I do not see a peephole2 that would generate this insn. Does
anyone know how this pattern is used?
Suggestions are appreciated!
Thanks,
Evan Cheng
Apple Computers, Inc.
details of the functions enabled
and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-
point code, see -mfpmath=sse.
Thus the confusion.
Evan
On Oct 3, 2005, at 3:25 PM, Andrew Pinski wrote:
On Oct 3, 2005, at 5:56 PM, Evan Cheng wrote:
My
My mistake. I misunderstood the meaning of -msse3 (it only enables
the sse3 builtins). Please ignore.
On Sep 29, 2005, at 1:48 PM, Evan Cheng wrote:
Hi,
I know this has been discussed in bug 18668. But I'd like to bring
it up again.
Currently, fisttp is only generated with -
by this.
Thanks,
Evan
Senior Compiler Engineer
Apple Computers
On Sep 29, 2005, at 1:48 PM, Evan Cheng wrote:
Hi,
I know this has been discussed in bug 18668. But I'd like to bring
it up again.
Currently, fisttp is only generated with -march=prescott. The
argument is fisttp is not
Hi,
I know this has been discussed in bug 18668. But I'd like to bring it
up again.
Currently, fisttp is only generated with -march=prescott. The
argument is fisttp is not a SSE instruction. While this is
technically true, it's likely to surprise the users. Intel, after
all, does lump f
