Hey folks,
I thought I'll post a follow up here in case it is of wider interest.
First, my colleague Nicolas Savoire did a Git bisect and identified the
commit[0] that stopped GCC from choosing AArch64 FP registers for pointer
storage. He even created a reproducer[1] on Godbolt that shows the
dif
Hey folks,
My colleague Nicolas Savoire created a compiler reproducer[0] for the
effect -- you can see a side-by-side comparison of code compiled with GCC
8.x and 9.x where 8.x emits fmov instructions and 9.x does not. He further
used this example as a git bisect criteria and eventually found the
On Mon, Feb 24, 2025 at 1:21 PM Florian Weimer wrote:
> * Attila Szegedi:
>
> >> That seems … quite unlikely. GCC 8 has seen extensive use on
> >> AArch64, on a variety of implementations, and I don't recall
> >> problems in this area. I don't follow AArch64 *that* closely,
> >> admittedly, but
On Mon, Feb 24, 2025 at 12:41 PM Florian Weimer wrote:
>
> Surely not preserving floating point bit patterns in registers would
> be a silicon bug?
Indeed it would be.
> That seems … quite unlikely. GCC 8 has seen
> extensive use on AArch64, on a variety of implementations, and I don't
> rec
Hi folks,
I'm looking for a bit of a historic context for a fun GCC behavior we
stumbled across. For... reasons we build some of our binaries using an
older version of GCC (8.3.1, yes, we'll be upgrading soon, and no, this
message is not about helping with an ancient version :-) )
We noticed that
