Re: MIPS RDHWR instruction reordering

2006-07-25 Thread Atsushi Nemoto
but the tense sounds wrong too. > Maybe it would be better to have something like: > > ; Putting rdhwr in a delay slot would make the kernel's emulation > ; of it much slower. > > right above the "can_delay" line. Whatever you feel is best though. Thank you.

Re: MIPS RDHWR instruction reordering

2006-07-24 Thread Atsushi Nemoto
ot build and run the testsuite natively (in reasonable time) due to limited CPU/memory resources on my target platform. Is there good way to run testsuite on cross environment? 2006-07-24 Atsushi Nemoto <[EMAIL PROTECTED]> partial PR target/28126 * config/mips/mips.md

Re: MIPS RDHWR instruction reordering

2006-07-22 Thread Atsushi Nemoto
On 21 Jul 2006 10:06:34 -0700, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: > I also don't see why revision 108713 would affect this. > > But I do note that this version is still bad. The rdhwr instruction > is in the branch delay slot, and is therefore always executed. Yes, and I think rdhwr sho

Re: MIPS RDHWR instruction reordering

2006-07-21 Thread Atsushi Nemoto
$2,$2,$3 lw $2,0($2) j $31 nop $L7: j $31 move $2,$0 And I can not see why the commit make such a difference... --- Atsushi Nemoto

gcc 4.x can not optimize access for array well

2006-07-13 Thread Atsushi Nemoto
eax movl%edx, %ecx jns .L5 movl%edx, (%esi) popl%ebx popl%esi popl%ebp ret --- Atsushi Nemoto

Re: MIPS RDHWR instruction reordering

2006-06-21 Thread Atsushi Nemoto
On 20 Jun 2006 09:10:43 -0700, Ian Lance Taylor <[EMAIL PROTECTED]> wrote: > > Should I file a bug report? > > Yes, please. Thanks. Done. http://gcc.gnu.org/bugzilla/show_bug.cgi?id=28126 --- Atsushi Nemoto

Re: MIPS RDHWR instruction reordering

2006-06-20 Thread Atsushi Nemoto
lw $2,0($2) j $31 nop JFYI. Should I file a bug report? --- Atsushi Nemoto

Re: MIPS RDHWR instruction reordering

2006-06-17 Thread Atsushi Nemoto
t;type" "unknown") (set_attr "mode" "")]) With "unspec_volatile", gcc do not move the rdhwr before the branch. But this change has bad side effects. For example, if I incremented a thread local variable, rdhwr is used twice (for load and store). So I suppose we should tell gcc that rdhwr is not cheap. But I do not know how to describe such information in .md file... --- Atsushi Nemoto

MIPS RDHWR instruction reordering

2006-06-16 Thread Atsushi Nemoto
result of the syscall. This add an additional exception for the syscall for usual case. I do not know much about gcc's internal. Any help are welcome. Thank you. --- Atsushi Nemoto