Sυbmіtting Μanuѕcripts to a Multidisciplinary Scientific Јournаl

2021-09-03 Thread Elliana Joseph
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gcc-10-20210903 is now available

2021-09-03 Thread GCC Administrator via Gcc
Snapshot gcc-10-20210903 is now available on https://gcc.gnu.org/pub/gcc/snapshots/10-20210903/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 10 git branch with the following options: git://gcc.gnu.org/git/gcc.git branch

Re: s390 port

2021-09-03 Thread Paul Edwards via Gcc
> This is not in one single place, but spread throughout the > compiler, both common code and back-end. I do not think it will > be possible to get the compiler to generate correct code if > you do not specify the address size correctly. 1. Is there any way to put a constraint on index registe

Re: s390 port

2021-09-03 Thread Jakub Jelinek via Gcc
On Fri, Sep 03, 2021 at 10:38:36PM +1000, Paul Edwards via Gcc wrote: > > This is not in one single place, but spread throughout the > > compiler, both common code and back-end. I do not think it will > > be possible to get the compiler to generate correct code if > > you do not specify the addres

Re: s390 port

2021-09-03 Thread Paul Edwards via Gcc
>> > Also, the compiler >> > will assume the base + index (+ displacement) arithmetic >> > will operate in 32 bits -- I'm pretty sure this is >> > actually the root cause of your "negative index" problem. >> Where is this logic please? Can I do a #if 0 or similar >> to disable it? > This is n

Re: s390 port

2021-09-03 Thread Ulrich Weigand via Gcc
"Paul Edwards" wrote on 03.09.2021 13:35:10: > > Specifically, if you try to run AMODE64 with Pmode equals > > SImode, the compiler will not be aware that the hardware > > uses the high 32 bits of base and index registers, and > > will not necessarily keep them zero. > The compiler naturally

Re: s390 port

2021-09-03 Thread Paul Edwards via Gcc
> - AMODE64 means the native address size is 64 bits. This > implies that Pmode has to be DImode, since Pmode tells > the compiler what the native address size is. > Specifically, if you try to run AMODE64 with Pmode equals > SImode, the compiler will not be aware that the hardware > uses th

Re: s390 port

2021-09-03 Thread Ulrich Weigand via Gcc
"Paul Edwards" wrote on 02.09.2021 22:05:39: > > Is this about supporting a 4GB address space instead > > of a 2GB space? > > Yes, correct. OK, that makes things clearer. This implies in particular: - 4GB address space means you need to run in AMODE64 - AMODE64 means the native address size

RE: How about providing an interface to fusing instructions via scheduling

2021-09-03 Thread Kyrylo Tkachov via Gcc
Hi, > -Original Message- > From: Gcc On Behalf > Of gengqi via Gcc > Sent: 03 September 2021 11:56 > To: gcc@gcc.gnu.org > Subject: How about providing an interface to fusing instructions via > scheduling > > When I was adding pipeline to my backend, some instructions needed to be > fuse

How about providing an interface to fusing instructions via scheduling

2021-09-03 Thread gengqi via Gcc
When I was adding pipeline to my backend, some instructions needed to be fused and I found that there was no suitable interface to implement my requirements. My hope is that 1. Do instruction scheduling and combine any two instructions, and sometimes the two instructions can be treated as 1 wh