Hi Krisztian,
On Thu, 29 Jun 2017, Paczári Krisztián wrote:
> GCJ has been removed from GCC 7.1, so these broken links should also be
> removed from the documentation page (https://gcc.gnu.org/onlinedocs/)
> and probably from the scripts generating them: "GCC 7.1 GCJ Manual (also
> in PDF or Po
Snapshot gcc-5-20170725 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/5-20170725/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 5 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-5
Hi Guys,
It has been a long time since my last post on the developments in
the toolchain, so there is lots to report:
---
Binutils:
Version 2.29 has been released.
In addition to previous changes already detailed in this bl
On 07/25/2017 06:32 AM, Oleg Endo wrote:
> On Tue, 2017-07-25 at 10:47 +0200, Jakob Wenzel wrote:
>>
>> jr's delay slot is not filled. However, if the declaration of a is
>> changed to `extern int a`, the delay slot is filled with the sw.
>>
>> The function responsible for this behavior seems to
Hello,
in the PowerPC ELFv2 specification
https://members.openpowerfoundation.org/document/dl/576
we have
"3.4.2 Use of the Small Data Area
For a data item in the .sdata or .sbss sections, a compiler may generate
short-form one-instruction refer-
ences. In an executable file or shared librar
On Tue, 2017-07-25 at 10:47 +0200, Jakob Wenzel wrote:
>
> jr's delay slot is not filled. However, if the declaration of a is
> changed to `extern int a`, the delay slot is filled with the sw.
>
> The function responsible for this behavior seems to be
> resource_conflicts_p in reorg.c. Sadly, I
Status
==
It's time to do a GCC 7.2 release and thus please check if you have
backports for regression or wrong-code bugs pending. The plan is to
do GCC 7.2 RC1 mid next week and a release roughly a week after that.
Quality Data
Priority # Change from last report
-
> The function responsible for this behavior seems to be
> resource_conflicts_p in reorg.c. Sadly, I could not find any comments
> explaining why volatile accesses cannot be put into delay slots.
>
> What is the reason for this behavior? I am unable to think of any
> situation where allowing volat
Hi all,
we are currently porting GCC to our own RISC architecture, which is
similar to MIPS. This architecture contains one unconditional branch
delay slot. The effect I noticed also occurs on MIPS, so I will be
focusing on that architecture in the following.
I noticed that GCC never puts ac
