> On May 11, 2015, at 6:16 PM, Thiago Farina wrote:
>
> Hi,
>
> Clang 3.7 generated the following code:
>
> $ clang -S -O0 -fno-unwind-tables -fno-asynchronous-unwind-tables
> add.c -o add_att_x64.s
>
> add:
> pushq %rbp
> movq%rsp, %rbp
> movl%edi, -4(%rb
Hi,
Clang 3.7 generated the following code:
$ clang -S -O0 -fno-unwind-tables -fno-asynchronous-unwind-tables
add.c -o add_att_x64.s
add:
pushq %rbp
movq%rsp, %rbp
movl%edi, -4(%rbp)
movl%esi, -8(%rbp)
movl-4(%rbp), %esi
add
On Mon, May 11, 2015 at 7:37 PM, Georg-Johann Lay wrote:
> BTW, what's the policy about unconditional jumps at that time? There are
> plenty of unconditional jumps around and all are legitimate; just this one
> generated by cse1 is wrong?
If you're in cfglayout mode, then there should be no uncon
Am 05/11/2015 um 06:58 PM schrieb Jeff Law:
Wow, that was fast!
On 05/11/2015 10:19 AM, Georg-Johann Lay wrote:
When pass outof_cfglayout is adding barriers, it appears that it misses
some situations and then runs into "ICE: missing barrier" in the
remainder (or, with checking disabled, into s
On 05/11/2015 10:19 AM, Georg-Johann Lay wrote:
When pass outof_cfglayout is adding barriers, it appears that it misses
some situations and then runs into "ICE: missing barrier" in the
remainder (or, with checking disabled, into some other assertion).
[ ... ]
The last else is entered for a
When pass outof_cfglayout is adding barriers, it appears that it misses some
situations and then runs into "ICE: missing barrier" in the remainder (or, with
checking disabled, into some other assertion).
cfgrtl.c:fixup_reorder_chain() reads:
/* Now add jumps and labels as needed to match t
On Mon, May 11, 2015 at 8:55 AM, H.J. Lu wrote:
> FYI,
>
> https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg
>
I am adding Intel MCU psABI support into binutils. This is the
first patch.
--
H.J.
---
bfd/
* elfcode.h (elf_object_p): Replace EM_486 with EM_IAMCU.
binutils/
* dwarf
FYI,
https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg
--
H.J.
On Mon, May 11, 2015 at 8:48 AM, Michael Matz wrote:
> Hi,
>
> On Mon, 11 May 2015, H.J. Lu wrote:
>
>> To remove one direct branch to PLT for external function calls:
>>
>> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg1.html
>>
>> I am proposing to add 2 new relocations, R_X86_64_RELAX_PC32
Hi,
On Mon, 11 May 2015, H.J. Lu wrote:
> To remove one direct branch to PLT for external function calls:
>
> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg1.html
>
> I am proposing to add 2 new relocations, R_X86_64_RELAX_PC32
> and R_X86_64_RELAX_PLT32:
>
> 1. They can only be used on 32
To remove one direct branch to PLT for external function calls:
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg1.html
I am proposing to add 2 new relocations, R_X86_64_RELAX_PC32
and R_X86_64_RELAX_PLT32:
1. They can only be used on 32-bit PC relative call/jmp instructions.
2. call/jmp instru
Is there an option to print out a summary of line numbers with errors/warnings?
Example output:
main.cpp : 2, 3, 17
lex.cpp : 4, 6, 8
I often don't need an error message to fix the error, so this would save me
much time.
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I've posted an update to PR 66014 regarding mingw64 slim LTO bootstrap
errors I had been getting I was hoping to get some comments on.
Though this resolves the problem for me, I'm wondering what other
potential issues similar to it may spring up and was hoping to get
some feedback.
In addition, th
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