conflicts between combine and pre global passes?

2012-04-27 Thread Bin.Cheng
Hi, I noticed that global passes before combine, like loop-invariant/cprop/cse2 some time have conflicts with combine. The combine pass can only operates with basic block, while these global passes move insns across basic block and left no description info. For example, a case I encountered. (ins

Re: IRA and two-phase load/store

2012-04-27 Thread Paul_Koning
I think this is what secondary reload is for. Check the internals manual. Something like this shows up in the pdp11 port, where float registers f4 and f5 can't be loaded/stored directly. You can see in that port how this is handled; it seems to work. paul On Apr 27, 2012, at 5:31 PM,

gcc-4.6-20120427 is now available

2012-04-27 Thread gccadmin
Snapshot gcc-4.6-20120427 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/4.6-20120427/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 4.6 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches

Re: IRA and two-phase load/store

2012-04-27 Thread Greg McGary
On 04/27/12 14:31, Greg McGary wrote: > I'm working on a port that does loads & stores in two phases. > Every load/store is funneled through the intermediate registers "ld" and "st" > standing between memory and the rest of the register file. > > Example: > ld=4(rB) > ... >

IRA and two-phase load/store

2012-04-27 Thread Greg McGary
I'm working on a port that does loads & stores in two phases. Every load/store is funneled through the intermediate registers "ld" and "st" standing between memory and the rest of the register file. Example: ld=4(rB) ... ... rC=ld st=rD 8(rB)=st rB

Fwd: Using movw/movt rather than minipools in ARM gcc

2012-04-27 Thread David Sehr
Hello All, We are using gcc trunk as of 4/27/12, and are attempting to add support to the ARM gcc compiler for Native Client. We are trying to get gcc -march=armv7-a to use movw/movt consistently instead of minipools. The motivation is for a new target variant where armv7-a is the minimum supporte

Congreso Nacional de Flotillas de Autotransporte Guadalajara, Monterrey y Mexico D.F

2012-04-27 Thread ALBERTO Mendoza
Congreso Nacional de Flotillas de Autotransporte 2012 Guadalajara 24 Y 25 de Mayo 2012 Monterrey 28 Y 29 de Mayo 2012 MÉXICO, D.F. 30 Y 31 de Mayo de 2012 Responda con los siguientes datos para recibir un folleto: Nombre: Empresa: Teléfono (Lada): Ext: Número de Interesados: Centro de At

Re: GCC47 movmem breaks RA, GCC46 RA is fine

2012-04-27 Thread Paulo J. Matos
On 27/04/12 11:49, Richard Guenther wrote: Yes, it inlines it. You may want to look at s390 which I believe has a similar block-copy operation. Richard. I looked at s390 and even though the block copy instruction seems similar ours is much more restrictive since it expects values in speci

Re: locating unsigned type for non-standard precision

2012-04-27 Thread Peter Bigot
On Fri, Apr 27, 2012 at 4:29 AM, Georg-Johann Lay wrote: > Richard Guenther wrote: >> [PR c/51527] >> >> I think the fix would be sth like >> >> Index: gcc/convert.c >> === >> --- gcc/convert.c       (revision 186871) >> +++ gcc/conve

Re: GCC47 movmem breaks RA, GCC46 RA is fine

2012-04-27 Thread Paulo J. Matos
On 27/04/12 11:49, Richard Guenther wrote: It feels to me that GCC46 version is better: * no branch to subroutine memcpy; * less stack usage (argument to enterl); So, using our block copy (bc2) instruction is an optimisation, don't you think? Yes, it inlines it. You may want to look at s390 w

Re: GCC47 movmem breaks RA, GCC46 RA is fine

2012-04-27 Thread Richard Guenther
On Fri, Apr 27, 2012 at 12:00 PM, Paulo J. Matos wrote: > On 27/04/12 09:21, Richard Guenther wrote: >>> >>> >>> This differs from what GCC47 does and seems to work better. >>> I would like help on how to best handle this situation under GCC47. >> >> >> Not provide movmem which looks like open-cod

Re: GCC47 movmem breaks RA, GCC46 RA is fine

2012-04-27 Thread Paulo J. Matos
On 27/04/12 09:21, Richard Guenther wrote: This differs from what GCC47 does and seems to work better. I would like help on how to best handle this situation under GCC47. Not provide movmem which looks like open-coded and not in any way "optimized"? Thanks Richard, however I don't understan

Re: locating unsigned type for non-standard precision

2012-04-27 Thread Richard Guenther
On Fri, Apr 27, 2012 at 11:29 AM, Georg-Johann Lay wrote: > Richard Guenther wrote: >> [PR c/51527] >> >> I think the fix would be sth like >> >> Index: gcc/convert.c >> === >> --- gcc/convert.c       (revision 186871) >> +++ gcc/conv

Re: locating unsigned type for non-standard precision

2012-04-27 Thread Georg-Johann Lay
Richard Guenther wrote: > [PR c/51527] > > I think the fix would be sth like > > Index: gcc/convert.c > === > --- gcc/convert.c (revision 186871) > +++ gcc/convert.c (working copy) > @@ -769,6 +769,7 @@ convert_to_integer

Re: GCC47 movmem breaks RA, GCC46 RA is fine

2012-04-27 Thread Richard Guenther
On Thu, Apr 26, 2012 at 6:16 PM, Paulo J. Matos wrote: > Hi, > > I am facing a problem with the GCC47 register allocation and my movmemqi. > GCC46 dealt very well with the problem but GCC47 keeps throwing at me > register spill failures. > > My backend has very few registers. 3 chip registers in t