On Thu, Jan 19, 2012 at 9:35 PM, Yang Yueming wrote:
> I want to do some optimizations for Cortex-A15,Is anyone doing this too or is
> there any work has been done?
>
> Yang Yueming
Hi there. Cortex-A15 boards aren't readily available so most of the
work is being done by the PDSW group inside A
Snapshot gcc-4.4-20120124 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.4-20120124/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.4 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches
Konstantin Vladimirov schrieb:
Hi,
This problem is backend independent, so I build reproduction in x86
backend. Consider code:
int func(int x);
int test(int x, int *data)
{
int retval;
register int *buffer asm ("eax");
buffer = data;
retval = func(x);
__asm__ __volatile__ (".interna
Thanks,
I was mistakenly only considering ports that defined
TARGET_FIXED_CONDITION_CODE_REGS
Paul.
On 23/01/12 11:23, Richard Henderson wrote:
On 01/18/2012 08:16 AM, Paul S wrote:
Thanks H-P,
That worked first time !
For a few days I had been searching the non cc0 ports for hints. T
Happy to oblige, when I believe I'm competent to advise others :-)
On 23/01/12 14:21, Hans-Peter Nilsson wrote:
On Mon, 23 Jan 2012, Paul S wrote:
Thanks Dave,
I would never have guessed from gccinternals.pdf that it is possible to use
mode iterators to select predicates& constraints ...
On Fri, 20 Jan 2012, Georg-Johann Lay wrote:
> Hi.
>
> avr-gcc implements a 24-bit scalar integer types __int24 and __uint24 in
> avr.c:TARGET_INIT_BUILTINS like so:
>
> tree int24_type = make_signed_type (GET_MODE_BITSIZE (PSImode));
> tree uint24_type = make_unsigned_type (GET_MODE_BITSIZ
On 24/01/12 17:32, Joseph S. Myers wrote:
On Thu, 19 Jan 2012, Ludovic Court�s wrote:
It turns out that ICC manages to build a working GCC plug-in, so after
I would say there is some conceptual confusion here (based on this
sentence, without having looked at the autoconf macros you refer to).
On Thu, 19 Jan 2012, Ludovic Court�s wrote:
> It turns out that ICC manages to build a working GCC plug-in, so after
I would say there is some conceptual confusion here (based on this
sentence, without having looked at the autoconf macros you refer to).
Logically there are two or three differe
On Tue, Jan 24, 2012 at 4:51 PM, Richard Sandiford
wrote:
> Richard Guenther writes:
>> On Mon, Jan 2, 2012 at 7:54 PM, Eric Botcazou wrote:
I'd say open a missed optimization bug with the testcase and go ahead
with both patches. Let's see if Eric has some comments first though.
>>>
>
Richard Guenther writes:
> On Mon, Jan 2, 2012 at 7:54 PM, Eric Botcazou wrote:
>>> I'd say open a missed optimization bug with the testcase and go ahead
>>> with both patches. Let's see if Eric has some comments first though.
>>
>> None, but the m32c maintainer may have some.
>>
>> DJ, do you h
Hello,
I ran into a bug with 4.6, when implementing a custom rtti framework, on
an Amd64 Debian Wheezy box. It seems that at certain optimization
levels, dtors of static objects are called multiple times. Attached a
test case. It will print 'DEADBEEF' when the bug is hit. Searched
bugzilla fo
On Mon, Jan 2, 2012 at 7:54 PM, Eric Botcazou wrote:
>> I'd say open a missed optimization bug with the testcase and go ahead
>> with both patches. Let's see if Eric has some comments first though.
>
> None, but the m32c maintainer may have some.
>
> DJ, do you happen to know the rationale for th
Hi,
This problem is backend independent, so I build reproduction in x86
backend. Consider code:
int func(int x);
int test(int x, int *data)
{
int retval;
register int *buffer asm ("eax");
buffer = data;
retval = func(x);
__asm__ __volatile__ (".internal_label _t." "4096"
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