This merge brings google/integration up to rev 178783. I also
merged rev 178833 to get the testsuite validation script I
committed to trunk yesterday.
Simon, Ollie, I expect our internal builder to fail until I
incorporate validate_failures.py into it. It's a catch-22, but
it is easier to keep t
On 09/14/2011 01:00 PM, Aldy Hernandez wrote:
> This was very painful, and it's still not over. We hadn't merged in
> almost 1.5 years, and we're paying for it now...
To be fair, the pause in merging was to have a stable base in which
to finish the Velox project. Of course, that ended 9 months a
This was very painful, and it's still not over. We hadn't merged in
almost 1.5 years, and we're paying for it now...
I managed to resolve all the conflicts, and bootstrap the compiler,
which is rather amazing given the size of the changes. There are still
over 16 compiler failures in gcc.dg/
On 09/14/2011 04:49 AM, Paulo J. Matos wrote:
Hi,
I am trying to fix 49801 from GCC 4.6.1.
One of the first things I noticed it that one of the BB at asmconst
looks like:
;; Start of basic block ( 2) -> 3
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u7(4){ }u8(5){ }u9(6){ }}
;; lr
Yes I know gcc 3.4.6 is quite old :) but the backend work has started on this
version for bad reasons and now we plan to make something work (pass a few test
cases) before migrating to last gcc 4 version.
Concerning REGISTER_MOVE_COST, I don't know what can be fixed with it.
The 3 params of REGI
BELBACHIR Selim writes:
> I'm writing a backend for gcc3.4.6 and I'm a bit confused about reload passes.
You know gcc 3.4.6 is really old, right?
> I have no mean to express this limitation inside predicates (because
> pseudo register don't known in which hard register they will be
> allocated)
Hi,
I'm writing a backend for gcc3.4.6 and I'm a bit confused about reload passes.
-> my constraints :
'b' = arithmetic/logical unit register ($R, class R_REGS)
'c' = counter register ($C, class C_REGS)
'v' = memory with several special constraint (also described in predicate
my_mem_or_reg_op
Hope all is well!
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Hi,
I am working on a 32bit private target which has the following restriction
1. store/load can happen only through a general purpose register (GP_REGS)
2. base register should be an address register (AD_REGS)
3. moves between GP_REGS and AD_REGS can happen only through PT_REGS
In a PRE_MODIFY
Hi,
I am trying to fix 49801 from GCC 4.6.1.
One of the first things I noticed it that one of the BB at asmconst
looks like:
;; Start of basic block ( 2) -> 3
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u7(4){ }u8(5){ }u9(6){ }}
;; lr in4 [AP] 5 [Y] 6 [Y] 26 27
;; lr use
Hi,
I tried to fix PLUGIN_FINISH_DECL as well to include typedefs in C++.
The followings does not currently trigger the PLUGIN_FINISH_DECL
(or not in all cases), but should them ?
- function parameters (in the function prototype)
- definition (with a function body) of a top-level function (whil
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