On Thu, 2009-08-27 at 00:24 -0400, Jason Merrill wrote:
> On 08/15/2009 10:12 AM, Jerry Quinn wrote:
> > Building with --enable-build-with-cxx fails to bootstrap as follows:
> >
> > Comparing stages 2 and 3
> > warning: gcc/cc1plus-checksum.o differs
> > warning: gcc/cc1-checksum.o differs
> > Boot
Snapshot gcc-4.3-20090830 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.3-20090830/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.3 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches
Danny Backx wrote:
> Hi,
>
> Does anyone know how well gcc-4.4 works with ARM and wmmx instructions ?
>
> I'm working on cegcc. It currently says :
> pavilion: {86} arm-mingw32ce-gcc -mcpu=iwmmxt t.c
> t.c:1: error: iwmmxt requires an AAPCS compatible ABI for proper
> operation
> pavilion: {87}
Hi,
Does anyone know how well gcc-4.4 works with ARM and wmmx instructions ?
I'm working on cegcc. It currently says :
pavilion: {86} arm-mingw32ce-gcc -mcpu=iwmmxt t.c
t.c:1: error: iwmmxt requires an AAPCS compatible ABI for proper
operation
pavilion: {87}
It's clear to me where in the source
> "Oliver" == Oliver Kellogg writes:
Oliver> As mentioned, I'm still struggling with leftovers being carried
Oliver> over from compilation 1 to N-1 into compilation N of a compile
Oliver> job. gcc_free'ing things (in combination with "configure
Oliver> --enable-checking=gc,gcac") helps me tr
Dear GCC Steering Committee,
We are a forming company (StreamNovation Ltd.) from Hungary, and we
would like to ask your attitude about our plans. We are intending to
implement a plugin for GCC 4.5 which makes it possible to utilize the
GPU (graphics processing unit) semi-automatically (later
fully
On Fri, 2009-08-28 at 06:58 -0700, Ian Lance Taylor wrote:
> oliver.kell...@t-online.de (Oliver Kellogg) writes:
>
> > In multi source compile mode, I ggc_free() the data in dwarf2out.c after
> > code generation for a file is done. (I found that I need this because
> > otherwise the assembly code
