comments do not match code.

2008-04-06 Thread Kenneth Zadeck
in reorg.c:3155 there is the following code: /* If we reach a CALL which is not calling a const function or the callee pops the arguments, then give up. */ if (CALL_P (our_prev) && (! CONST_OR_PURE_CALL_P (our_prev) || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat))

Re: http://gcc.gnu.org/onlinedocs/libstdc++/ needs a bit of help

2008-04-06 Thread Gerald Pfeifer
On Sun, 23 Mar 2008, Paolo Carlini wrote: >> Working on the link consistency of the http://gcc.gnu.org, I ran into >> a couple of links on the libstdc++ side that are in need of a bit love. >> It would be great could one of you libstdc++ guys look into those. > Should be all fixed with the below, a

Re: RFC: PowerPC floating point features

2008-04-06 Thread Michael Eager
Daniel Jacobowitz wrote: On Sun, Apr 06, 2008 at 10:25:38AM -0700, Michael Eager wrote: For an instruction supported on all variants (both BookE and E500) with a double precision FPU. I think you have your terminology switched. E500 is (very approximately) an implementation of Book E; the FPR

Re: RFC: PowerPC floating point features

2008-04-06 Thread Daniel Jacobowitz
On Sun, Apr 06, 2008 at 10:25:38AM -0700, Michael Eager wrote: > For an instruction supported on all variants (both BookE and E500) > with a double precision FPU. I think you have your terminology switched. E500 is (very approximately) an implementation of Book E; the FPR-based FPU is usually cal

Re: RFC: PowerPC floating point features

2008-04-06 Thread David Edelsohn
You need to negotiate this with the E500 developers who created this set of options. David

Re: RFC: PowerPC floating point features

2008-04-06 Thread Michael Eager
David Edelsohn wrote: I would prefer feature-based. TARGET_HARD_FLOAT represents the presence of FPUs. TARGET_FPRS represents the presence of FP register set because one variant used GPRs for FP operations. E500 then added another variant with double-precision F