Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread 吴曦
2007/7/29, 吴曦 <[EMAIL PROTECTED]>: > 28 Jul 2007 12:16:51 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > "吴曦" <[EMAIL PROTECTED]> writes: > > > > > 28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > > > "吴曦" <[EMAIL PROTECTED]> writes: > > > > > > > > > there are some questions

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread 吴曦
28 Jul 2007 12:16:51 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > "吴曦" <[EMAIL PROTECTED]> writes: > > > 28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > > "吴曦" <[EMAIL PROTECTED]> writes: > > > > > > > there are some questions after I read the source code today. > > > > 1st.

Re: "Proceedings of the GCC Developers' Summit" now available

2007-07-28 Thread Gerald Pfeifer
On Fri, 27 Jul 2007, Diego Novillo wrote: >> Why not provide a permanent home for the GCC summit proceedings at >> gcc.gnu.org? It seems the logical place. > That's what I've done. The .pdf is *in* gcc.gnu.org. The others could > be sucked in as well. They're now pointing to gccsummit. Current

You introduced a memory leak with the IPA-SSA stuff

2007-07-28 Thread Daniel Berlin
It used to be that the bitmap obstack known as "alias_bitmap_obstack" was released and renewed every time we called compute_may_aliases. This didn't really leak because the absolute last one was destroyed at the end of compilation. You changed it to be only released if gimple_aliases_computed_p (c

Re: Creating gcc-newbies mailing list

2007-07-28 Thread Gerald Pfeifer
On Fri, 27 Jul 2007, Rask Ingemann Lambertsen wrote: > This part of the documentation is fragmented in a way such that I > sometimes can't find what I'm looking for, even if I know it is there > (somewhere). For example, when it comes to submitting patches, we have > http://gcc.gnu.org/codingcon

Re: gcc register allocation

2007-07-28 Thread Ian Lance Taylor
"Purll, Duncan" <[EMAIL PROTECTED]> writes: > DISCLAIMER: > Unless indicated otherwise, the information contained in this message is > privileged and confidential, and is intended only for the use of the > addressee(s) named above and others who have been specifically authorized to > receive it

Re: GCC 4.2.1 : bootstrap fails at stage 2. compiler produces wrong binary for wrong processor

2007-07-28 Thread Dennis Clarke
>> The default cpu is v8plus. > > v9 actually, which automatically enables the V8+ stuff in 32-bit mode. That isn't what I see here. The output binary was definately for a v8plus processor. That would be a UltraSparc 1 at the least. ELF Header ei_magic: { 0x7f, E, L, F } ei_class: ELFCL

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread Ian Lance Taylor
"吴曦" <[EMAIL PROTECTED]> writes: > 28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > "吴曦" <[EMAIL PROTECTED]> writes: > > > > > there are some questions after I read the source code today. > > > 1st. if I add the instrumentation before 2nd scheduling; will gcc emit > > > an ins

Re: GCC 4.2.1 : bootstrap fails at stage 2. compiler produces wrong binary for wrong processor

2007-07-28 Thread Eric Botcazou
The default cpu is v8plus. v9 actually, which automatically enables the V8+ stuff in 32-bit mode. -- Eric Botcazou

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread 吴曦
28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > "吴曦" <[EMAIL PROTECTED]> writes: > > > there are some questions after I read the source code today. > > 1st. if I add the instrumentation before 2nd scheduling; will gcc emit > > an insn which will be output as a ld instruction lat

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread Ian Lance Taylor
"吴曦" <[EMAIL PROTECTED]> writes: > there are some questions after I read the source code today. > 1st. if I add the instrumentation before 2nd scheduling; will gcc emit > an insn which will be output as a ld instruction later? If this could > happen, some ld instruction may not be instrumented...

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread 吴曦
2007/7/28, 吴曦 <[EMAIL PROTECTED]>: > 2007/7/28, Ramana Radhakrishnan <[EMAIL PROTECTED]>: > > Hi, > > > > > > On 7/28/07, 吴曦 <[EMAIL PROTECTED]> wrote: > > > > > > > I am working on gcc 4.1.1 and itanium2 architecture. I > > > > > > > instrumented > > > > > > > each ld and st instruction in final_

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread 吴曦
2007/7/28, Ramana Radhakrishnan <[EMAIL PROTECTED]>: > Hi, > > > On 7/28/07, 吴曦 <[EMAIL PROTECTED]> wrote: > > > > > > I am working on gcc 4.1.1 and itanium2 architecture. I instrumented > > > > > > each ld and st instruction in final_scan_insn() by looking at the > > > > > > insn > > > > > > temp