On Thu, Jan 10, 2019 at 4:26 AM Mark Wielaard wrote:
> https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#procedure-calling-convention
> But I couldn't find an official DWARF register mapping.
> If you have references I like to add them to the code.
This document now has a chap
On Thu, Jan 10, 2019 at 4:26 AM Mark Wielaard wrote:
> We really should add a non-native test, so it is easier to test on
> other arches. But currently only aarch64 has one (run-funcretval.sh).
> I'll see if I can extend that to other arches. Then we can also see if
> we can get the aggregates cor
On Thu, Jan 10, 2019 at 4:26 AM Mark Wielaard wrote:
> The comments explain things well, but it would be good to have official
> references to the calling convention and DWARF register mappings.
> The calling convention is explained in:
>
> https://github.com/riscv/riscv-elf-psabi-doc/blob/master/
On Thu, 2018-12-27 at 15:26 -0800, Jim Wilson wrote:
> Started with the aarch64 support and modified it for RISC-V. The
> flattened
> structure support hasn't been written yet, but the rest of it should
> be
> correct for the LP64D ABI. We have potentially 6 different ABIs to
> support,
> so this