> Interrupt handler - userspace plays with the irq lines, I think we could
> have issues getting interrupts when we have no master.
Undoubtedly - PCI interrupts are asynchronous to the other busses and can
turn up suprisingly late. It ought to be sufficient to clear the IRQ
cause kernel side and
The DRM has never been able to support multiple X servers for DRI that
could be chvt'ed between (fast-user-switching...)
This is my first attempt at a patch to provide this support. With it and a
slightly hacked up intel driver I can run two servers with gears on each
and chvt between them (it
