From: Jerome Glisse
ib pool weren't free for various newer asic on module unload.
This doesn't cause much arm but still could be candidate for
stable.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |1 +
drivers/gpu/drm/radeon/ni.c|1 +
drivers/gpu/drm/rade
From: Jerome Glisse
atombios functuion DIG*EncoderControl works more reliably (100% link training
success vs 30% link training success on some monitor like HP ZR22w) for DP link
training than DPEncoderService for DCE3 display block.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atomb
From: Jerome Glisse
DPEncoderService newer than 1.1 can't properly program the DP (display port)
link training. When facing such version use the DIGxEncoderControl method
instead. Fix DP link training on some R7XX.
Signed-off-by: Jerome Glisse
Reviewed-by: Alex Deucher
Cc: stable at kernel.org
From: Jerome Glisse
Some CP interrupt were left enabled when disabling interrupt.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |2 +-
drivers/gpu/drm/radeon/r600.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/e
From: Jerome Glisse
Heresy should not be tolerated, any ioctl that rely on pure luck
should die. Violating memory pining kernel policy and all the
reasonable expection kernel have about user of mmu_notifier api
is not tolerable.
Because we can neither broke old userspace the ioctl is left but
i
From: Jerome Glisse
get_user_pages gives no garanty that page it returns are still
the one backing the vma by the time it returns. Thus any ioctl
that rely on this behavior is broken and rely on pure luck. To
avoid any false hope from userspace stop such useage by simply
flat out returning -EFAUL
From: J?r?me Glisse
When accel is not working on device with virtual address space radeon
segfault because the ib buffer is NULL and trying to map it inside the
virtual address space trigger segfault. This patch only map the ib
buffer if accel is working.
Cc:
Signed-off-by: J?r?me Glisse
---
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61 +
radeon/radeon_surface.c | 663 +++
radeon/radeon_surface.h | 30 +++
3 files changed, 709 insertions(+), 45 deletions(-)
diff --git a/include/drm/radeon_drm
From: Jerome Glisse
Allow userspace to query for the tile mode array so userspace can properly
compute surface pitch and alignment requirement depending on tiling.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 1 +
drivers/gpu/drm/radeon/radeon_drv.c | 3 +-
driver
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61 +
radeon/radeon_surface.c | 664 +++
radeon/radeon_surface.h | 31 +++
3 files changed, 711 insertions(+), 4
From: Jerome Glisse
Allow userspace to query for the tile mode array so userspace can properly
compute surface pitch and alignment requirement depending on tiling.
v2: Make strict aliasing safer by casting to char when copying
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61 +
radeon/radeon_surface.c | 658 +++
radeon/radeon_surface.h | 31 +
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61
1 file changed, 61 insertions(+)
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 00d66b3..ff3ce3a 100644
--- a/include/drm/radeon_drm.h
++
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
Signed-off-by: Jerome Glisse
---
radeon/radeon_surface.c | 658
radeon/radeon_surface.h
From: Jerome Glisse
v2: sync with radeon-next tree for 3.10
http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 81
1 file changed, 81 insertions(+)
diff --git a/include
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
v5: update against lastest next tree for radeon
Signed-off-by: Jerome Glisse
---
radeon/radeon_surface.c | 658 +
From: Jerome Glisse
This is to allow debugging of userspace program not freeing buffer
after, which is basicly a memory leak. This print the list of all
gem object along with their size and placement (VRAM,GTT,CPU) and
with the pid of the task that created them.
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
Retry label was at wrong place in function leading to memory
leak.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_object.c
b/drivers/gpu/drm
From: Jerome Glisse
To have kernel behave like VGA/DVI we need to retrain link
on hotplug. For this to happen with need to report that
we need to link training to happen if we fail to get link
status and we need to force link training to happen by
setting connector dpms to off before asking it on
From: Jerome Glisse
We want to print link status query failed only if it's
an unexepected fail. If we query to see if we need
link training it might be because there is nothing
connected and thus link status query have the right
to fail in that case.
To avoid printing failure when it's expected,
From: Jerome Glisse
We should not turn off the connector neither try to retrain DP link
if a passive DP adaptor is connected to a DP port.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_connectors.c | 22 --
1 file changed, 20 insertions(+), 2 deletio
From: Jerome Glisse
The external encoder need to be setup again before enabling the
transmiter. This seems to be only needed on some trinity/aruba
to fix dpms on.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atombios_encoders.c |6 --
1 file changed, 4 insertions(+), 2
From: Jerome Glisse
The external encoder need to be setup again before enabling the
transmiter. This seems to be only needed on some trinity/aruba
to fix dpms on.
v2: Add comment, only setup again on dce6 ie aruba or newer.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atombios
From: Jerome Glisse
When we change start address of vram for the GPU memory controller
we need to make sure that nothing in the GPU still use the old vram
address. This patch cleanup and fix crtc address.
However there is still someissue somewhere if we reenable the crtc
after updating the addre
So first patch is a fix in itself, smallest possible and should go to
stable. Second patch is an improvement as a first step to flicker free
boot.
I have yet extensively tested second patch, especialy not on AGP but
so far on few GPU/motherboard it looks good. It can probably wait 3.7.
Will test i
From: Jerome Glisse
It seems we can not update the crtc scanout address. After disabling
crtc, update to base address do not take effect after crtc being
reenable leading to at least frame being scanout from the old crtc
base address. Disabling crtc display request lead to same behavior.
So afte
From: Jerome Glisse
It seems we can't move the VRAM GPU address without disabling CRTC.
Thus if we want to support flicker free boot from UEFI to X, we need
to keep the VRAM GPU address UEFI programmed. So far on all UEFI
checked this address was something sane.
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
Fix regresson since the introduction of command stream checking on
evergreen (thread referenced below). Issue is cause by ddx allocating
bo with formula width*height*bpp while programming the GPU command
stream with ALIGN(height, 8). In some case (where page alignment does
not
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
cc: stable at vger.kernel.org
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_device.c |9 ---
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To avoid segault to hap
From: Jerome Glisse
Print various CP register that have valuable informations regarding
GPU lockup.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c | 16
drivers/gpu/drm/radeon/evergreend.h |4
drivers/gpu/drm/radeon/ni.c | 16
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To avoid segault to hap
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To avoid segault to hap
From: Jerome Glisse
After unrecovered GPU lockup avoid any GPU activities to avoid
things like kernel segfault and alike to happen in any of the
path that assume hw is working.
The segfault is due to PCIE vram gart table being unmapped after
suspend in the GPU reset path. To avoid segault to hap
From: Jerome Glisse
For 6xx+. Required for mesa to use htile support for HiZ/HiS.
Userspace will check radeon version 2.14 with is bumped either
by tiling patch or stream out patch. This patch only add support
for htile relocation which should be enough for any userspace
to implement the hyperz
From: Jerome Glisse
Need to free the uvd ring. Also reshuffle gart tear down to
happen after uvd tear down.
Signed-off-by: J?r?me Glisse
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/radeon/evergreen.c | 2 +-
drivers/gpu/drm/radeon/radeon_uvd.c | 2 ++
drivers/gpu/drm/radeon/rv770.c
From: Jerome Glisse
We need to take reference on the sync object while holding the
fence spinlock but at the same time we don't want to allocate
memory while holding the spinlock. This patch make sure we
enforce both of this constraint.
Fix https://bugzilla.redhat.com/show_bug.cgi?id=906296
Sig
From: Jerome Glisse
We need to take reference on the sync object while holding the
fence spinlock but at the same time we don't want to allocate
memory while holding the spinlock. This patch make sure we
enforce both of this constraint.
v2: actually test build it
Fix https://bugzilla.redhat.com
From: Jerome Glisse
In some rare case were packet is big enough to go over page boundary
we might not have copied yet the userspace data into the local copy
resulting in kernel reading garbage data.
Without this patch kernel might submit unprocessed/unrelocated cmd
to the GPU which might lead to
From: Jerome Glisse
When ever parsing cmd buffer supplied by userspace we need to use
radeon_get_ib_value rather than directly accessing the ib as the user
cmd might not yet be copied into the ib thus the parser might read
value that does not correspond to what user is sending and possibly
allowi
From: Jerome Glisse
This patch print a warning message when trying to reserve same buffer
twice in same cs ioctl (because the buffer is known by userspace under
2 different handle). It does not try to fix the issue like :
https://patchwork.kernel.org/patch/1812991/
Just to make this case easier
From: Jerome Glisse
This patch print a warning message when trying to reserve same buffer
twice in same cs ioctl (because the buffer is known by userspace under
2 different handle). It does not try to fix the issue like :
https://patchwork.kernel.org/patch/1812991/
Just to make this case easier
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c
b/drivers/gpu/drm/radeon/radeon_ring.c
index ebd6956..9410e43 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
From: Jerome Glisse
To help debug dma related lockup.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c | 4
drivers/gpu/drm/radeon/evergreend.h | 3 +++
drivers/gpu/drm/radeon/ni.c | 4
drivers/gpu/drm/radeon/nid.h| 1 -
drivers/gpu/drm/radeon/r600
From: Jerome Glisse
Print 32dword before last know rptr as problem most likely comes
from previous command. Also small cosmetic change to the printing.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions
From: Jerome Glisse
This try to reset the dma engine when performing gpu reset. Hopefully
bringing back the gpu dma engine in sane state.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c | 30 +-
drivers/gpu/drm/radeon/evergreend.h | 10 +
From: Jerome Glisse
Those rn50 chip are often connected to console remoting hw and load
detection often fails with those. Just don't try to load detect and
report connect.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 8
1 file changed, 8 insertion
From: Jerome Glisse
We were checking the index against the size of the relocation buffer
instead of against the last index. This fix kernel segfault when
userspace submit ill formated command stream/relocation buffer pair.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r600_cs.c | 6 +
From: Jerome Glisse
This simplify and cleanup the async dma checking.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c| 16 +-
drivers/gpu/drm/radeon/evergreen_cs.c | 807 +-
drivers/gpu/drm/radeon/evergreend.h | 29 +-
3 files changed
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 2 ++
drivers/gpu/drm/radeon/radeon_ring.c | 2 ++
drivers/gpu/drm/radeon/radeon_semaphore.c | 4
3 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/g
From: Jerome Glisse
Aruba and newer gpu does not need the avivo cursor work around,
quite the opposite this work around lead to corruption.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_cursor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
So it's pretty much the same patchset except for patch 7 (use mutex
instead of spinlock) and 9 & 10 which correspond to previous patch 9
split in two and the sa allocation being simplified.
The patchset can be found at :
http://people.freedesktop.org/~glisse/reset/
Cheers,
Jerome Glisse
From: Christian K?nig
Different rings have different criteria to test
if they are stuck.
v2: rebased on current drm-next
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |4 +-
drivers/gpu/drm/radeon/radeon_asi
From: Christian K?nig
It makes no sense at all to have more than one flag.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c |1 -
drivers/gpu/drm/radeon/r300.c |1 -
drivers/gpu/drm/radeon/radeon.h
From: Christian K?nig
Just register the debugfs files on init instead of
checking the chipset type multiple times.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c | 31 +++
1 files chan
From: Christian K?nig
Removing all the different error messages and
having just one standard behaviour over all
chipset generations.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |7 ++-
drivers/gpu/drm/ra
From: Christian K?nig
Previusly multiple rings could trigger multiple GPU
resets at the same time.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |3 +-
drivers/gpu/drm/radeon/radeon_fence.c | 150 +
2 f
From: Christian K?nig
Aligning offset can make it bigger than tmp->offset
leading to an overrun bug in the following subtraction.
v2: Against initial suspicions this can't happen in mainline,
so no need to push it into stable.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Revi
From: Christian K?nig
Make the suballocator self containing to locking.
v2: split the bugfix into a seperate patch.
v3: Jerome Glisse use mutex, no reason to use spinlock that
are more heavyweight than mutex
Signed-off-by: Christian K?nig
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/
From: Christian K?nig
Dumping the current allocations.
v2: convert to mutex
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.h |5 +
drivers/gpu/drm/radeon/radeon_ring.c | 22 ++
drivers/gpu/drm/radeon/radeon_s
From: Jerome Glisse
The sa allocator is suppose to be a ring allocator, ie allocation
happen first at the end and if there is no more room we start at
the begining again. This patch make the code match this design.
sa_manager keep track of the start & end hole, it first try to
allocate in the end
From: Jerome Glisse
wakequeue is use in case we want to wait until we got something
that allow to allocate the object.
Signed-off-by: Christian K?nig
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_gart.c |2 +-
drivers/gpu
From: Christian K?nig
Instead of hacking the calculation multiple times.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_gart.c |6 ++
drivers/gpu/drm/radeon/radeon_object.h | 11 +++
drivers/gpu/drm/radeon/radeon_ring.c |6
From: Christian K?nig
Directly use the suballocator to get small chunks
of memory. It's equally fast and doesn't crash when
we encounter a GPU reset.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c|1 -
drivers/gpu/drm/radeon/ni.c
From: Christian K?nig
We should signal the caller that we haven't waited at all.
v2: only change fence_wait_next not fence_wait_last.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_fence.c |2 +-
1 files changed, 1
From: Christian K?nig
As discussed with Michel that name better
describes the behavior of this function.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|2 +-
drivers/gpu/drm/radeon/radeon_device.c |2 +-
From: Christian K?nig
Should be used to free resource that are protected by a fence.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |8 -
drivers/gpu/drm/radeon/radeon_fence.c | 50 +---
2 files changed
From: Christian K?nig
It's never used and so practically superfluous.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |1 -
drivers/gpu/drm/radeon/radeon_fence.c |7 ---
2 files changed, 0 insertions(+), 8 deletions(-)
diff --gi
From: Christian K?nig
To prevent deadlocks under extreme conditions.
v2: rebase on top of new sa_manager patch
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_gart.c |2 +-
drivers/gpu/drm/rade
From: Christian K?nig
It isn't necessary any more and the suballocator
seems to perform even better.
v2: ignore ERESTARTSYS in error reporting,
split fence changes into seperate patch,
use try_free SA callback to avoid lockups
v3: rebase on top of sa manager new patch
Signed-off-by: Chr
From: Christian K?nig
Rings need to lock in order, otherwise
the ring subsystem can deadlock.
v2: fix error handling and number of locked doublewords.
v3: stop creating unneeded semaphores.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h
From: Christian K?nig
Instead of all this humpy pumpy with recursive
mutex (which also fixes only halve of the problem)
move the actual gpu reset out of the fence code,
return -EDEADLK and then reset the gpu in the
calling ioctl function.
v2: Split removal of radeon_mutex into separate patch.
From: Christian K?nig
Not needed anymore.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h| 44 +---
drivers/gpu/drm/radeon/radeon_cs.c | 10 +++---
drivers/gpu/drm/radeon/radeon_device.c |2 +-
drive
From: Christian K?nig
It isn't chipset specific, so it makes no sense
to have that inside r100.c.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |5 +--
drivers/gpu/drm/radeon/ni.c |5 +--
drivers/gpu/drm/radeon/r100.c
From: Christian K?nig
Don't hard code the 10 seconds timeout. Compute jobs
can run much longer.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |1 +
drivers/gpu/drm/radeon/radeon_drv.c |4
drivers/gpu/drm/radeon/radeon_ring.c |
From: Christian K?nig
Fixing just another deadlock problem with gpu reset tests.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c
b
From: Christian K?nig
Nothing chipset or ring specific with it,
so also move it to radon_ring.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c | 10 +-
drivers/gpu/drm/radeon/ni.c | 11 +--
drivers/gpu/drm/radeon/
From: Christian K?nig
Since it is now identical to r100_gpu_is_lockup.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r300.c| 14 --
drivers/gpu/drm/radeon/radeon_asic.c | 16
drivers/gpu/drm/radeon/radeon_asic.h |
From: Christian K?nig
Since it is now identical to evergreen_gpu_is_lockup.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/ni.c | 19 ---
drivers/gpu/drm/radeon/radeon_asic.c | 12 ++--
drivers/gpu/drm/radeon/radeon_as
Ok so i reread stuff and the :
drm/radeon: add general purpose fence signaled callback
is a big NAK actually. It change the paradigm. Moving most of
the handling into the irq process which is something i am intimatly
convinced we should avoid.
Here is the patchset up to ib pool cleanup. I have yet
From: Christian K?nig
Different rings have different criteria to test
if they are stuck.
v2: rebased on current drm-next
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |4 +-
drivers/gpu/drm/radeon/radeon_asi
From: Christian K?nig
It makes no sense at all to have more than one flag.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c |1 -
drivers/gpu/drm/radeon/r300.c |1 -
drivers/gpu/drm/radeon/radeon.h
From: Christian K?nig
Just register the debugfs files on init instead of
checking the chipset type multiple times.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ring.c | 31 +++
1 files chan
From: Christian K?nig
Removing all the different error messages and
having just one standard behaviour over all
chipset generations.
Signed-off-by: Christian K?nig
Reviewed-by: Alex Deucher
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |7 ++-
drivers/gpu/drm/ra
From: Christian K?nig
Previusly multiple rings could trigger multiple GPU
resets at the same time.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |3 +-
drivers/gpu/drm/radeon/radeon_fence.c | 150 +
2 f
From: Christian K?nig
Aligning offset can make it bigger than tmp->offset
leading to an overrun bug in the following subtraction.
v2: Against initial suspicions this can't happen in mainline,
so no need to push it into stable.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Revi
From: Christian K?nig
Make the suballocator self containing to locking.
v2: split the bugfix into a seperate patch.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|1 +
drivers/gpu/drm/radeon/radeon_sa.c | 17 +++--
2 files
From: Christian K?nig
Dumping the current allocations.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.h |5 +
drivers/gpu/drm/radeon/radeon_ring.c | 22 ++
drivers/gpu/drm/radeon/radeon_sa.c | 14 +++
From: Jerome Glisse
The sa allocator is suppose to be a ring allocator, ie allocation
happen first at the end and if there is no more room we start at
the begining again. This patch make the code match this design.
sa_manager keep track of the start & end hole, it first try to
allocate in the end
From: Christian K?nig
We should signal the caller that we haven't waited at all.
v2: only change fence_wait_next not fence_wait_last.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_fence.c |2 +-
1 files changed, 1
From: Christian K?nig
As discussed with Michel that name better
describes the behavior of this function.
Signed-off-by: Christian K?nig
Reviewed-by: Michel D?nzer
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h|2 +-
drivers/gpu/drm/radeon/radeon_device.c |2 +-
From: Christian K?nig
It's never used and so practically superfluous.
Signed-off-by: Christian K?nig
Reviewed-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h |1 -
drivers/gpu/drm/radeon/radeon_fence.c |7 ---
2 files changed, 0 insertions(+), 8 deletions(-)
diff --gi
From: Jerome Glisse
This allow to associate a fence with sa bo and retry and
wait if sa bo alloc can block.
v2: bug fixes
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 10 ++-
drivers/gpu/drm/radeon/radeon_cs.c|4 +-
drivers/gpu/drm/radeon/radeon_g
So here are sa improvement, ib pool cleanup and semaphore cleanup.
Those are Christian patches rebased on top of its last 17 patchset
and on top of sa allocator change.
The idea is that the sa_bo struct is not free until associated fence
is signaled. Meanwhile the ib structure or the semaphore/fen
From: Jerome Glisse
This patch is ground work for having the sa allocator as a standalone
self contained helper. Each sa_bo can be associated with a fence and
when allocating new one you can ask to block until there is room for
satisfying your request.
It also change the sa allocation logic. The
From: Christian K?nig
It isn't necessary any more and the suballocator
seems to perform even better.
v2: ignore ERESTARTSYS in error reporting,
split fence changes into seperate patch,
use try_free SA callback to avoid lockups
v3: rebase on top of sa manager new patch
v4: rebase on top o
From: Jerome Glisse
Both ib and semaphore are always associated with a fence, rework the
sa allocator to store the fence in the sa_bo allowing sa allocator
to wait for a fence and retry allocation. This also simplify the ib
& semaphore code. Simpify semaphore code to use the sa allocator.
Signed
So this patchset convert the fence to use 64bits sequence and simplify
the fence code (dropping fence lock). I am still convinced that the
best solution is to have the various helper code deals with fence
cleanup/processing. The last patch show an example of what can be
done to improve sa allocator
From: Jerome Glisse
This convert fence to use uint64_t sequence number intention is
to use the fact that uin64_t is big enough that we don't need to
care about wrap around.
Tested with and without writeback using 0xF000 as initial
fence sequence and thus allowing to test the wrap around from
From: Jerome Glisse
This add the number of adjacent scratch reg you want to allocate
or free to the scratch alloc/free function.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r100.c | 12 ++--
drivers/gpu/drm/radeon/r420.c |4 ++--
drivers/gpu/drm/rade
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