Add LS7A DC vsync interrupt enable and close function, and
register irq_handler function interface.
Add vbrank event processing flow.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile| 3 +-
drivers/gpu/drm/loongson/loongson_crtc.c | 43 +-
drivers/gpu/drm
Implement use GPIO and I2C driver to detect connector
and fetch EDID via DDC.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile | 3 +-
drivers/gpu/drm/loongson/loongson_connector.c | 70 -
drivers/gpu/drm/loongson/loongson_drv.c | 16 +-
drivers/gpu
From: Chenyang Li
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM drive
From: Chenyang Li
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM drive
Implement use GPIO and I2C driver to detect connector
and fetch EDID via DDC.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile | 3 +-
drivers/gpu/drm/loongson/loongson_connector.c | 70 -
drivers/gpu/drm/loongson/loongson_drv.c | 16 +-
drivers/gpu/drm
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM driver registration are
c
Hi, sunhao.
>
> Add GPIO and I2C driver to detect connector and fetch EDID via DDC.
>
It's even better to add what V2 has changed.
> Signed-off-by: Hao Sun
> ---
> drivers/gpu/drm/loongson/Makefile | 3 +-
> drivers/gpu/drm/loongson/loongson_connector.c | 120 +++-
>
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM driver registration are
c