Hi,
On Fri 04 Jul 25, 17:41, Paul Kocialkowski wrote:
> The v3s mixer config definition is a bit messy. Tidy it up.
> No function change is intended.
This patch didn't make it in the previous cycle.
Would it be possible to pick it up this time?
Thanks!
Paul
> Signed-off-by: Pau
Hi,
On Fri 27 Dec 24, 16:37, Parthiban Nallathambi wrote:
> A133/A100 SoC doesn't have reset control from the CCU. Get reset
> control line optionally.
With the dt bindings fixed, this:
Reviewed-by: Paul Kocialkowski
Although feel free to use a first uppercase later in the title a
latforms do need the reset line,
the required part should be applied conditionally based on the compatible, not
removed entirely.
Also your commit title and message would look better with uppercase first
letters at the start of a sentence :)
All the best,
Paul
> additionalProperties: fals
> +description: Shenzhen Baijie Technology Co., Ltd.
>"^tbs,.*":
> description: TBS Technologies
>"^tbs-biometrics,.*":
>
> --
> 2.39.5
>
>
--
Paul Kocialkowski,
Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/
Expert in multimedia, graphics and embedded hardware support with Linux.
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Description: PGP signature
Hi,
Le Mon 04 Aug 25, 17:32, Neil Armstrong a écrit :
> On Wed, 02 Jul 2025 10:22:29 +0200, Paul Kocialkowski wrote:
> > Add the Olimex LCD-OLinuXino-5CTS, a 5-inch TFT LCD panel.
>
> Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
> (drm-misc-next)
Tha
The v3s mixer config definition is a bit messy. Tidy it up.
No function change is intended.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers
Hi Maxime,
Le Wed 02 Jul 25, 13:36, Maxime Ripard a écrit :
> On Tue, Jul 01, 2025 at 10:11:24PM +0200, Paul Kocialkowski wrote:
> > The DE mixer clock is currently set to run at 150 MHz, while the
> > Allwinner BSP configures it at 300 MHz and other platforms typically
>
Add support for the Olimex LCD-OLinuXino-5CTS, a 5-inch TFT LCD panel
with a mode operating at 33.3 MHz.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
Add the Olimex LCD-OLinuXino-5CTS, a 5-inch TFT LCD panel.
Signed-off-by: Paul Kocialkowski
---
Changes since v1:
- Fixed yaml indentation.
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree
The CSI SCLK clock is incorrectly called CSI1 SCLK while it is used for
both the CSI0 and CSI1 interfaces and is called CSI SCLK all around the
documentation.
Fix the name in the driver, header and device-tree.
Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-of
Add support for the Olimex LCD-OLinuXino-5CTS, a 5-inch TFT LCD panel
with a mode operating at 33.3 MHz.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
Add the Olimex LCD-OLinuXino-5CTS, a 5-inch TFT LCD panel.
Signed-off-by: Paul Kocialkowski
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
b
fields of the v3s mixer config while at it.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 8b41d33baa30
The TCON clock can be parented to both the video PLL and the periph0 PLL.
Add the latter, which was missing from the list.
Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Paul Kocialkowski
---
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 2 +-
1 file changed, 1
The CSI1 MCLK clock is reported as "csi-mclk" while it is specific to
CSI1 as the name of the definition indicates. Fix it in the driver.
Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Paul Kocialkowski
---
drivers/clk/sunxi-ng/ccu-sun8i-
The original comment doesn't match the pin attribution, probably due
to a hasty copy/paste.
Signed-off-by: Paul Kocialkowski
---
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
b/dr
the pixel rate. Bringing the de block to the same
clock rate as the csi block helps in some cases.
Paul Kocialkowski (5):
pinctrl: sunxi: v3s: Fix wrong comment about UART2 pinmux
clk: sunxi-ng: v3s: Fix CSI SCLK clock name
clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name
clk: sunxi-ng: v3s
eflect the introduction of the
property.
Paul
> #clock-cells = <0>;
>
> ports {
> --
> 2.25.1
>
>
--
Paul Kocialkowski,
Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/
Expert in multimedia, graphics and embedded hardware support with Linux.
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+ void(*disable_lvds_phy)(struct sun4i_tcon *tcon,
> + const struct drm_encoder *encoder);
> };
>
> struct sun4i_tcon {
> @@ -282,6 +285,9 @@ struct sun4i_tcon {
> /* Associated crtc */
> struct sun4i_crtc *crtc;
>
>
rue,
> + .supports_lvds = true,
> .dclk_min_div = 1,
> .set_mux= sun8i_r40_tcon_tv_set_mux,
> + .setup_lvds_phy = sun20i_tcon_setup_lvds_dphy,
> + .disable_lvds_phy = sun20i_tcon_disable_lvds_dphy,
> };
>
> /* s
5 ++++++-
> 4 files changed, 119 insertions(+), 2 deletions(-)
>
> --
> 2.25.1
>
>
--
Paul Kocialkowski,
Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/
Expert in multimedia, graphics and embedded hardware support with Linux.
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On Wed 25 Jun 25, 15:06, Parthiban wrote:
>
> On 6/25/25 2:16 PM, Paul Kocialkowski wrote:
> > Hi and thanks for your work!
> >
> > On Fri 27 Dec 24, 16:37, Parthiban Nallathambi wrote:
> >> lvds, lcd, dsi all shares the same GPIO D bank and lvds0
> >> d
/* CTS */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /*
On Wed 25 Jun 25, 10:03, Paul Kocialkowski wrote:
> On Fri 21 Feb 25, 17:17, Kuba Szczodrzyński wrote:
> > @@ -183,6 +184,8 @@ static void sun4i_tcon_lvds_set_status(struct
> > sun4i_tcon *tcon,
> > } else {
> > regmap_update_bits(tcon->
sun6i_dphy_ops = {
> .configure = sun6i_dphy_configure,
> @@ -535,6 +549,7 @@ static const struct phy_ops sun6i_dphy_ops = {
> .power_off = sun6i_dphy_power_off,
> .init = sun6i_dphy_init,
> .exit = sun6i_dphy_exit,
> + .set_mode = sun6i_s
quot;, "PD9";
> + function = "lvds0";
> + drive-strength = <30>;
> + bias-disable;
> + };
> +
> /omit-if-no-ref/
>
phy_power_off,
> + .set_mode = sun6i_dphy_set_mode,
> .init = sun6i_dphy_init,
> .exit = sun6i_dphy_exit,
> };
> @@ -619,6 +678,8 @@ static const struct sun6i_dphy_variant
> sun6i_a31_mipi_dphy_variant = {
>
> static const struct sun6i_dphy_variant sun50i_a100_mipi_dphy_variant = {
> .tx_power_on= sun50i_a100_mipi_dphy_tx_power_on,
> + .lvds_power_on = sun50i_a100_mipi_dphy_lvds_power_on,
> + .is_combo_dphy = true,
> };
>
> static const struct of_device_id sun6i_dphy_of_table[] = {
> --
> 2.25.1
>
>
--
Paul Kocialkowski,
Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/
Expert in multimedia, graphics and embedded hardware support with Linux.
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Description: PGP signature
Update my email address as I am no longer working at Bootlin and have
started my own consulting company: sys-base.
Signed-off-by: Paul Kocialkowski
---
MAINTAINERS | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c1fcc56bf2fb
cs);
> +
> + ret = drm_simple_display_pipe_init(drm, &priv->pipe,
> +&sharp_ls027b7dh01_pipe_funcs,
> +sharp_ls027b7dh01_formats,
> +
> ARRAY_SIZE(sharp_ls02
Hi folks,
On Wed 25 Oct 23, 15:09, Paul Kocialkowski wrote:
> The buffer_sel, voffset and hoffset values are calculated from u32
> values and might overflow under certain conditions.
>
> Move them to u32 definitions instead of u8/u16 to avoid the issue.
Any chance to get a quick re
Use the existing macro instead of redefining it.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/logicvc/logicvc_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/logicvc/logicvc_regs.h
b/drivers/gpu/drm/logicvc/logicvc_regs.h
index 4aae27e9ba2b
The buffer_sel, voffset and hoffset values are calculated from u32
values and might overflow under certain conditions.
Move them to u32 definitions instead of u8/u16 to avoid the issue.
Signed-off-by: Paul Kocialkowski
Reported-by: Dan Carpenter
Fixes: efeeaefe9be5 ("drm: Add support fo
Hi,
On Tue 20 Jun 23, 11:56, Sui Jingfeng wrote:
> Hi,
>
> On 2023/6/8 15:15, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Thu 08 Jun 23, 10:42, Sui Jingfeng wrote:
> > > drm/logicvc driver is depend on REGMAP and REGMAP_MMIO, should select this
> >
> > to the idea to get rid of struct drm_device *dev. Most discussion was
> > > about splitting the series and the right name to use instead of "dev".
> >
> > And then you have a former and current maintainers that tell you that
> > they'd prefer not
ev is
bad for something that refers to the subsystem-specific dev in some
subsystem-specific object kind of implies that it would make sense to have
a struct device called dev in that structure, which adds more confusion as this
is generally not the case.
So I would also be happier without th
mipi-dbi.c | 6 +-
> drivers/gpu/drm/tiny/repaper.c| 8 +-
> drivers/gpu/drm/tiny/simpledrm.c | 2 +-
> drivers/gpu/drm/tiny/st7586.c | 6 +-
> drivers/gpu/drm/tiny/st7735r.c| 4 +-
> drivers/gpu/drm/tve
clk"
> [drivers/gpu/drm/logicvc/logicvc-drm.ko] undefined!
> make[1]: *** [scripts/Makefile.modpost:136: Module.symvers] Error 1
> make: *** [Makefile:1978: modpost] Error 2
>
> Signed-off-by: Sui Jingfeng
Thanks for the fix, looks good to me!
Acked-by: Paul Kocialkowski
uses the rk3566 SOC.
> Before applying the patch I displayed a color pattern with modetest
> before suspend and it appeared correctly. Then I suspended and resumed
> the device, attempted to display the same color pattern, and only got
> a single pixel on an otherwise blank display. Aft
s an alternative is no longer needed.
>
> Signed-off-by: Jean Delvare
> Cc: Paul Kocialkowski
> Cc: David Airlie
> Cc: Daniel Vetter
Sounds good to me!
Reviewed-by: Paul Kocialkowski
Cheers,
Paul
> ---
> drivers/gpu/drm/logicvc/Kconfig |2 +-
> 1 file changed
Hi Dan,
On Mon 27 Jun 22, 08:26, Dan Carpenter wrote:
> On Fri, Jun 24, 2022 at 04:53:25PM +0200, Paul Kocialkowski wrote:
> > Hello Dan,
> >
> > On Tue 14 Jun 22, 15:07, Dan Carpenter wrote:
> > > Hello Paul Kocialkowski,
> > >
> > > The patch
Hello Dan,
On Tue 14 Jun 22, 15:07, Dan Carpenter wrote:
> Hello Paul Kocialkowski,
>
> The patch efeeaefe9be5: "drm: Add support for the LogiCVC display
> controller" from May 20, 2022, leads to the following Smatch static
> checker warning:
>
> drivers/
and mode flags.
No difference needed in the binding at all then, I suppose.
> Cc: Quentin Schulz
> Signed-off-by: Quentin Schulz
Reviewed-by: Paul Kocialkowski
Cheers,
Paul
> ---
> .../devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml | 1 +
> 1 file changed,
tails and mode flags.
>
> Cc: Quentin Schulz
> Signed-off-by: Klaus Goger
> Signed-off-by: Quentin Schulz
Reviewed-by: Paul Kocialkowski
Cheers,
Paul
> ---
> .../drm/panel/panel-leadtek-ltk050h3146w.c| 87 +++
> 1 file changed, 87 insertions(+)
>
> d
o the .data field of of_device_id
> structure.
>
> Cc: Quentin Schulz
> Signed-off-by: Quentin Schulz
LGTM:
Reviewed-by: Paul Kocialkowski
Cheers,
Paul
> ---
> drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 delet
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 151 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 155 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/logicvc
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
MAINTAINERS | 6 +
drivers
There are lots of different versions of the logicvc block and it
makes little sense to list them all in compatibles since all versions
with the same major are found to be register-compatible.
Introduce a new compatible with the major version only.
Signed-off-by: Paul Kocialkowski
There are lots of different versions of the logicvc block and it
makes little sense to list them all in compatibles since all versions
with the same major are found to be register-compatible.
Add common compatibles that only list the major version instead.
Signed-off-by: Paul Kocialkowski
There are lots of different versions of the logicvc block and it
makes little sense to list them all in compatibles since all versions
with the same major are found to be register-compatible.
Introduce a new compatible with the major version only.
Signed-off-by: Paul Kocialkowski
t property and count layers child nodes instead.
Paul Kocialkowski (6):
dt-bindings: mfd: logicvc: Add a compatible with the major version
only
dt-bindings: gpio: logicvc: Add a compatible with major version only
gpio: logicvc: Support compatible with major version only
dt-bindings: di
Support the newly-introduced common compatible for version 3.
Signed-off-by: Paul Kocialkowski
---
drivers/gpio/gpio-logicvc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-logicvc.c b/drivers/gpio/gpio-logicvc.c
index 992cc958a43f..9b27343f5242
Hi,
On Tue 14 Sep 21, 22:05, Paul Kocialkowski wrote:
> This series introduces support for the LogiCVC display controller.
> The controller is a bit unusual since it is usually loaded as
> programmable logic on Xilinx FPGAs or Zynq-7000 SoCs.
> More details are presented on the mai
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 151 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 155 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/logicvc
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
MAINTAINERS | 6 +
drivers
The LogiCVC multi-function device has a display part which is now
described in its binding. Add a patternProperties match for it.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
Acked-by: Rob Herring
---
.../display/xylon,logicvc-display.yaml| 302 ++
1 file changed, 302 insertions(+)
create mode 100644
Documentation
ribed more possible dt parameters;
- Added support for the lvds-3bit interface;
- Added support for grabbing syscon regmap from parent node;
- Removed layers count property and count layers child nodes instead.
Paul Kocialkowski (4):
dt-bindings: display: Document the Xylon LogiCVC display contr
Hi Rob,
I just found out as I'm about to send a new revision that I had not yet
responded to your concerns here.
On Tue 12 Jan 21, 09:17, Rob Herring wrote:
> On Wed, Dec 23, 2020 at 10:29:44PM +0100, Paul Kocialkowski wrote:
> > The Xylon LogiCVC is a display controller
mething for colorkey:
> > https://drmdb.emersion.fr/properties/4008636142/colorkey
> >
> > I know this is marked "not for merge", but it would be nice to discuss
> > with them and come up with a standardized property.
--
Paul Kocialkowski, B
Hi,
On Thu 24 Dec 20, 10:01, Rob Herring wrote:
> On Wed, 23 Dec 2020 22:29:44 +0100, Paul Kocialkowski wrote:
> > The Xylon LogiCVC is a display controller implemented as programmable
> > logic in Xilinx FPGAs.
> >
> > Signed-off-by: Paul Kocialkowski
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 150 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 154 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/logicvc
The LogiCVC multi-function device has a display part which is now
described in its binding. Add a patternProperties match for it.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
MAINTAINERS | 6 +
drivers
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
Acked-by: Rob Herring
---
.../display/xylon,logicvc-display.yaml| 313 ++
1 file changed, 313 insertions(+)
create mode 100644
Documentation
t bindings documentation to dt schema;
- Described more possible dt parameters;
- Added support for the lvds-3bit interface;
- Added support for grabbing syscon regmap from parent node;
- Removed layers count property and count layers child nodes instead.
Paul Kocialkowski (4):
dt-bindings: display
Hi,
On Mon 07 Dec 20, 11:42, Maxime Ripard wrote:
> On Wed, Dec 02, 2020 at 05:06:40PM +0100, Paul Kocialkowski wrote:
> > > > +static void logicvc_crtc_atomic_begin(struct drm_crtc *drm_crtc,
> > > > + str
Hi,
On Tue 03 Nov 20, 10:46, Maxime Ripard wrote:
> On Mon, Nov 02, 2020 at 04:53:07PM +0100, Paul Kocialkowski wrote:
> > Introduces a driver for the LogiCVC display controller, a programmable
> > logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
> &
Hi Sam,
On Wed 04 Nov 20, 22:22, Sam Ravnborg wrote:
> Hi Paul.
>
> A few comments in the following. I did not find time to read all of the
> driver.
Thanks for taking a look at the driver!
>
> Sam
>
> On Mon, Nov 02, 2020 at 04:53:07PM +0100, Paul Kocialkowski
iable in that case.
Fixes: 34cc0aa25456 ("drm/rockchip: Add support for Rockchip Soc LVDS")
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/rockchip/rockchip_lvds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c
b/
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
Acked-by: Rob Herring
---
.../display/xylon,logicvc-display.yaml| 313 ++
1 file changed, 313 insertions(+)
create mode 100644
Documentation
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 143 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 149 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/logicvc/logicvc_drm.h
b/drivers/gpu/drm/l
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
MAINTAINERS | 6 +
drivers
more possible dt parameters;
- Added support for the lvds-3bit interface;
- Added support for grabbing syscon regmap from parent node;
- Removed layers count property and count layers child nodes instead.
Cheers!
Paul Kocialkowski (3):
dt-bindings: display: Document the Xylon LogiCVC display
Hi,
On Mon 04 May 20, 13:45, Daniel Vetter wrote:
> On Thu, Apr 30, 2020 at 09:10:07PM +0200, Paul Kocialkowski wrote:
> > Hi Daniel,
> >
> > On Fri 03 Apr 20, 13:04, Daniel Vetter wrote:
> > > On Fri, Apr 03, 2020 at 11:36:17AM +0200, Paul Kocialkowski wrote:
>
of trivial suggestions - if you agree, feel free to
> keep them as follow-up patches.
>
> On Thu, 30 Apr 2020 at 20:28, Paul Kocialkowski
> wrote:
>
> > +int logicvc_of_property_parse_u32(struct device_node *of_node,
> > + const c
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
MAINTAINERS | 6 +
drivers
parameters;
- Added support for the lvds-3bit interface;
- Added support for grabbing syscon regmap from parent node;
- Removed layers count property and count layers child nodes instead.
Cheers!
Paul Kocialkowski (3):
dt-bindings: display: Document the Xylon LogiCVC display controller
drm: Add
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 143 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 149 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/logicvc/logicvc_drm.h
b/drivers/gpu/drm/l
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
Acked-by: Rob Herring
---
.../display/xylon,logicvc-display.yaml| 313 ++
1 file changed, 313 insertions(+)
create mode 100644
Documentation
Hi Daniel,
On Fri 03 Apr 20, 13:04, Daniel Vetter wrote:
> On Fri, Apr 03, 2020 at 11:36:17AM +0200, Paul Kocialkowski wrote:
> > Introduces a driver for the LogiCVC display controller, a programmable
> > logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
> &
alizer extension to avoid this.
Looks good to me:
Reviewed-by: Paul Kocialkowski
But maybe use the drm/sun4i: dsi: prefix instead (granted, it wasn't used in
the commit being fixed).
Cheers,
Paul
> Fixes: bb3b6fcb6849 ("sun6i: dsi: Convert to generic phy handling")
> S
required fields to the PX30 VOP window descriptions,
which makes per-pixel-alpha formats behave correctly.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 3 +++
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 9
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
MAINTAINERS | 6 +
drivers
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
Acked-by: Rob Herring
---
.../display/xylon,logicvc-display.yaml| 313 ++
1 file changed, 313 insertions(+)
create mode 100644
Documentation
documentation to dt schema;
- Described more possible dt parameters;
- Added support for the lvds-3bit interface;
- Added support for grabbing syscon regmap from parent node;
- Removed layers count property and count layers child nodes instead.
Cheers!
Paul Kocialkowski (2):
dt-bindings: display: Document
embedding &struct drm_device can call drm_dev_alloc() instead.
In my case, I like the fact that drm_dev_alloc correctly wraps drm_dev_init
and drmm_add_final_kfree (and I'd rather not add & all around unless I'm
obliged to ;)
Cheers,
Paul
--
Paul Kocialkowski, Bootlin
Embed
akes sense and it's apparently the norm to not report any modifier blob
when only linear is supported, so let's stick to that.
Note that when the reverted patch was applied, the core didn't set
allow_fb_modifiers on its own yet. But it does now so let's rely on it instead.
R
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/logicvc/logicvc_drm.h | 3 +
drivers/gpu/drm/logicvc/logicvc_layer.c | 147 +++-
drivers/gpu/drm/logicvc/logicvc_layer.h | 7 ++
3 files changed, 153 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/logicvc
implementation of
logicvc_layer_buffer_find_setup for specifics.
Version 4 allows configuring each buffer address directly, which
guarantees that any buffer can be configured.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Maxime Ripard
---
drivers/gpu/drm/Kconfig | 2 +
drivers
.
Cheers!
Paul Kocialkowski (3):
dt-bindings: display: Document the Xylon LogiCVC display controller
drm: Add support for the LogiCVC display controller
WIP: drm/logicvc: Add plane colorkey support
.../display/xylon,logicvc-display.yaml| 313
drivers/gpu/drm/Kconfig
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
---
.../display/xylon,logicvc-display.yaml| 313 ++
1 file changed, 313 insertions(+)
create mode 100644
Documentation/devicetree/bindings
Hi,
On Wed 20 Nov 19, 10:02, Rob Herring wrote:
> On Wed, Nov 20, 2019 at 8:50 AM Paul Kocialkowski
> wrote:
> >
> > Hi,
> >
> > Circling back to this thread now, sorry for the delay.
> >
> > On Tue 24 Sep 19, 09:58, Rob Herring wrote:
> > >
Hi,
On Fri 27 Sep 19, 17:20, Rob Herring wrote:
> On Fri, Sep 27, 2019 at 12:07:37PM +0200, Paul Kocialkowski wrote:
> > The Xylon LogiCVC is a display controller implemented as programmable
> > logic in Xilinx FPGAs.
> >
> > Signed-off-by: Paul Kocialkowski
>
Hi,
Circling back to this thread now, sorry for the delay.
On Tue 24 Sep 19, 09:58, Rob Herring wrote:
> On Mon, Sep 23, 2019 at 10:33 AM Paul Kocialkowski
> wrote:
> >
> > Hi,
> >
> > On Fri 13 Sep 19, 20:16, Rob Herring wrote:
> > > On Fri, Se
Hi,
On Wed 13 Nov 19, 11:04, Patrik Jakobsson wrote:
> On Tue, Nov 12, 2019 at 4:50 PM Paul Kocialkowski
> wrote:
> >
> > Hi,
> >
> > On Tue 12 Nov 19, 16:11, Paul Kocialkowski wrote:
> > > Hi,
> > >
> > > On Tue 12 Nov 19, 11:20, Patri
Hi,
On Tue 12 Nov 19, 16:11, Paul Kocialkowski wrote:
> Hi,
>
> On Tue 12 Nov 19, 11:20, Patrik Jakobsson wrote:
> > On Thu, Nov 7, 2019 at 4:30 PM Paul Kocialkowski
> > wrote:
> > >
> > > psbfb_probe performs an evaluation of the required size from t
Hi,
On Tue 12 Nov 19, 11:20, Patrik Jakobsson wrote:
> On Thu, Nov 7, 2019 at 4:30 PM Paul Kocialkowski
> wrote:
> >
> > psbfb_probe performs an evaluation of the required size from the stolen
> > GTT memory, but gets it wrong in two distinct ways:
> > - The re
switching to 16bpp when one connector is e.g. 1920x1080
and the other is 1024x768.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/gma500/framebuffer.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/gma500/framebuffer.c
b/drivers/gpu/drm/gma500
Hi,
On Wed 06 Nov 19, 16:23, Patrik Jakobsson wrote:
> On Wed, Nov 6, 2019 at 10:44 AM Paul Kocialkowski
> wrote:
> >
> > This adds a missing call to drm_crtc_vblank_on to the common DPMS helper
> > (used by poulsbo and cedartrail), which is called in the CRTC enable path
platforms (oaktrail and medfield) use a dedicated DPMS helper that
does not have the proper vblank on/off hooks. They are not added in this
commit due to lack of hardware to test it with.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/gma500/gma_display.c | 2 ++
1 file changed, 2 insertions
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