ng prop value to: 0x
opened device `RockChip Soc DRM` on driver `rockchip` (version 1.0.0 at 0)
Read BACKGROUND_COLOR prop (ARGB64): 0x
Connector: HDMI-A-2
background color (10bpc): r=0x0 g=0x0 b=0x0
Signed-off-by: Cristian Ciocaltea
---
Changes in
On 10/6/25 7:26 PM, Laurent Pinchart wrote:
> On Mon, Oct 06, 2025 at 05:37:23PM +0300, Cristian Ciocaltea wrote:
>> On 10/6/25 3:02 PM, Dmitry Baryshkov wrote:
>>> On Mon, Oct 06, 2025 at 02:55:38AM +0300, Laurent Pinchart wrote:
>>>> From: Cristian Ciocaltea
&
On 10/6/25 7:25 PM, Laurent Pinchart wrote:
> On Mon, Oct 06, 2025 at 02:19:24PM +0300, Dmitry Baryshkov wrote:
>> On Mon, Oct 06, 2025 at 02:55:37AM +0300, Laurent Pinchart wrote:
>>> From: Cristian Ciocaltea
>>>
>>> Add an optional property to RK3588 HDMI TX
On 2025/09/11, Marius Vlad wrote:
> From: Derek Foreman
>
> This adds YUV444 and Auto, which will fallback to RGB as per
> commit "drm: Pass supported color formats straight onto drm_bridge".
>
> Signed-off-by: Derek Foreman
> Signed-off-by: Marius Vlad
> ---
> .../gpu/drm/rockchip/dw_hdmi_qp-r
Hi Dmitry,
On 9/5/25 2:48 AM, Dmitry Baryshkov wrote:
> On Wed, Sep 03, 2025 at 09:50:58PM +0300, Cristian Ciocaltea wrote:
>> The first patch in the series implements the CEC capability of the
>> Synopsys DesignWare HDMI QP TX controller found in RK3588 & RK3576 Socs.
>
Hi Daniel,
On 8/29/25 6:21 PM, Daniel Stone wrote:
> Hi Cristian,
>
> On Mon, 25 Aug 2025 at 10:57, Cristian Ciocaltea
> wrote:
>> @@ -1255,6 +1254,11 @@ struct dw_hdmi_qp *dw_hdmi_qp_bind(struct
>> platform_device *pdev,
>>
Hello Heiko,
On 9/3/25 9:50 PM, Cristian Ciocaltea wrote:
> The first patch in the series implements the CEC capability of the
> Synopsys DesignWare HDMI QP TX controller found in RK3588 & RK3576 Socs.
> This is based on the downstream code, but rewritten on top of the CEC
&g
in
dw_hdmi_qp_init_hw().
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 12 +---
include/drm/bridge/dw_hdmi_qp.h | 1 +
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
b
In order to support correct initialization of the timer base in the HDMI
QP IP block, setup platform data to include the required reference clock
rate.
While at it, ensure plat_data is zero-initialized in
dw_hdmi_qp_rockchip_bind().
Reviewed-by: Daniel Stone
Signed-off-by: Cristian Ciocaltea
Enable support for the CEC interface of the Synopsys DesignWare HDMI QP
IP block.
This is used by all boards based on RK3588 & RK3576 SoCs.
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/
In order to support the CEC interface of the DesignWare HDMI QP IP
block, setup platform data to include the required IRQ number.
Reviewed-by: Daniel Stone
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4
1 file changed, 4 insertions(+)
diff --git
dev_err_probe(), which also reduces the code a bit.
Reviewed-by: Daniel Stone
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 62 ++
1 file changed, 24 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp
uot;).
Signed-off-by: Cristian Ciocaltea
---
Changes in v4:
- Fixed the bisect-related issues reported by Daniel by implementing
the following operations in dw_hdmi_qp_bind():
* Disable CEC support when the related IRQ is not available
* Set ref_clk_rate to vendor default in case it was n
CEC IRQ number to be provided by the platform driver.
Co-developed-by: Algea Cao
Signed-off-by: Algea Cao
Co-developed-by: Derek Foreman
Signed-off-by: Derek Foreman
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/Kconfig | 8
Hello Heiko,
On 9/3/25 2:59 PM, Heiko Stuebner wrote:
> Hi Andy,
>
> Am Mittwoch, 3. September 2025, 13:07:38 Mitteleuropäische Sommerzeit schrieb
> Andy Yan:
>> From: Andy Yan
>>
>> Convert it to drm bridge driver, it will be convenient for us to
>> migrate the connector part to the display dr
On 9/2/25 4:36 PM, Ville Syrjälä wrote:
> On Tue, Sep 02, 2025 at 12:27:56PM +0300, Cristian Ciocaltea wrote:
>> Some display controllers can be hardware programmed to show non-black
>> colors for pixels that are either not covered by any plane or are
>> exposed through t
Hi Raphael,
On 9/2/25 4:19 PM, Raphael Gallais-Pou wrote:
>
>
> On 9/2/25 11:27, Cristian Ciocaltea wrote:
>> Some display controllers can be hardware-configured to present non-black
>> colors for pixels which are not covered by any plane (or are exposed
>> through tr
background color (10bpc): r=0 g=0 b=0
Signed-off-by: Cristian Ciocaltea
---
Cristian Ciocaltea (2):
drm: Add CRTC background color property
drm/rockchip: vop2: Support setting custom background color
drivers/gpu/drm/drm_atomic_state_helper.c| 1 +
drivers/gpu/drm/drm_atomic_u
are
used, as this is the maximum precision supported by the display
controller.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 13 -
drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 4
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git
format value to be built with the
help of a dedicated drm_argb64() utility macro. Individual color
components can be extracted with desired precision using the
corresponding DRM_ARGB64_*() macros.
Co-developed-by: Matt Roper
Signed-off-by: Matt Roper
Signed-off-by: Cristian Ciocaltea
current HDMI output format and bpc.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 11 +--
include/drm/bridge/dw_hdmi_qp.h | 4
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi
CCF and, instead, prefer the PHY configuration API for
this purpose.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 37 +-
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
need to adjust it dynamically, i.e. per
SoC variant, for now.
While setting up .enc_init() callbacks of rockchip_hdmi_qp_ctrl_ops,
also replace the unnecessary whitespace chars before .irq_callback()
assignments.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp
other defines which are unlikely to be ever
required.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
b/drivers/gpu/drm
Y PLL rate * 8 / bpc
Hence there is no need for VOP2 to compensate for bpc when adjusting
DCLK, but it is required to do so when computing its maximum operating
frequency.
Take color depth into consideration before deciding to switch DCLK
source.
Signed-off-by: Cristian Ciocaltea
---
drivers/gp
conflicts with the HDMI CEC series [1], hence I added
that as a b4-managed dependency.
[1]
https://lore.kernel.org/all/20250825-rk3588-hdmi-cec-v3-0-95324fb22...@collabora.com/
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
- Replaced patch 'drm/rockchip: vop2: Add high color dept
dev_err_probe(), which also reduces the code a bit.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 62 ++
1 file changed, 24 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
b/drivers/gpu/drm
In order to support correct initialization of the timer base in the HDMI
QP IP block, setup platform data to include the required reference clock
rate.
While at it, ensure plat_data is zero-initialized in
dw_hdmi_qp_rockchip_bind().
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm
In order to support the CEC interface of the DesignWare HDMI QP IP
block, setup platform data to include the required IRQ number.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip
Enable support for the CEC interface of the Synopsys DesignWare HDMI QP
IP block.
This is used by all boards based on RK3588 & RK3576 SoCs.
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/
CEC IRQ number to be provided by the platform driver.
Co-developed-by: Algea Cao
Signed-off-by: Algea Cao
Co-developed-by: Derek Foreman
Signed-off-by: Derek Foreman
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/Kconfig | 8
: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 11 ---
include/drm/bridge/dw_hdmi_qp.h | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
index
uot;).
Signed-off-by: Cristian Ciocaltea
---
Changes in v3:
- Fixup PATCH 1 according to the recent upstream commit 02bb63d1a593
("drm/bridge: Make dp/hdmi_audio_* callback keep the same paramter
order with get_modes") which changed the signature of ->hdmi_cec_init()
callback
plane shaper LUT and TF
driver-specific properties")
Fixes: 671994e3bf33 ("drm/amd/display: add plane 3D LUT driver-specific
properties")
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 16
1 file changed, 8 insertions(+), 8 deleti
atic long rk_hdptx_phy_clk_round_rate(struct clk_hw
> *hw, unsigned long rate,
>* hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with
>* a different rate argument.
>*/
> - return hdptx->hdmi_cfg.tmds_char_rate;
> + req->rate = hdptx->hdmi_cfg.tmds_char_rate;
> +
> + return 0;
> }
This LGTM now, hence
Reviewed-by: Cristian Ciocaltea
Hi Andy,
On 7/24/25 11:56 AM, Andy Yan wrote:
>
>
>
> Hello Cristian，
> 在 2025-07-22 14:16:26，"Cristian Ciocaltea"
> 写道：
>> Hi Andy,
>>
>> On 7/22/25 5:24 AM, Andy Yan wrote:
>>>
>>> Hello Cristian，
>>>
>>>
Hi Andy,
On 7/22/25 9:55 AM, Andy Yan wrote:
>
> Hello Cristian,
>
> 在 2025-07-22 14:16:26，"Cristian Ciocaltea"
> 写道：
>> Hi Andy,
>>
>> On 7/22/25 5:24 AM, Andy Yan wrote:
>>>
>>> Hello Cristian，
>>>
>>> At 2025
Hi Andy,
On 7/22/25 5:24 AM, Andy Yan wrote:
>
> Hello Cristian，
>
> At 2025-07-22 01:39:04, "Cristian Ciocaltea"
> wrote:
>> Take the bits per color channel into consideration when computing DCLK
>> rate.
>>
>> Signed-off-by: Crist
Take the bits per color channel into consideration when computing DCLK
rate.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
b/drivers/gpu/drm/rockchip
CCF and, instead, prefer the PHY configuration API for
this purpose.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 37 +-
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
current HDMI output format and bpc.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 11 +--
include/drm/bridge/dw_hdmi_qp.h | 4
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi
need to adjust it dynamically, i.e. per
SoC variant, for now.
While setting up .enc_init() callbacks of rockchip_hdmi_qp_ctrl_ops,
also replace the unnecessary whitespace chars before .irq_callback()
assignments.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp
other defines which are unlikely to be ever
required.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
b/drivers/gpu/drm
: Cristian Ciocaltea
---
Cristian Ciocaltea (5):
drm/rockchip: vop2: Add high color depth support
drm/bridge: dw-hdmi-qp: Handle platform supported formats and color depth
drm/rockchip: dw_hdmi_qp: Switch to phy_configure()
drm/rockchip: dw_hdmi_qp: Use bit macros for RK3576 regs
Hi Brian,
On 7/10/25 7:07 PM, Brian Masney wrote:
> The round_rate() clk ops is deprecated, so migrate this driver from
> round_rate() to determine_rate() using the Coccinelle semantic patch
> on the cover letter of this series.
>
> Signed-off-by: Brian Masney
> ---
> drivers/phy/rockchip/phy-r
Enable support for the CEC interface of the Synopsys DesignWare HDMI QP
IP block.
This is used by all boards based on RK3588 & RK3576 SoCs.
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/
In order to support correct initialization of the timer base in the HDMI
QP IP block, setup platform data to include the required reference clock
rate.
While at it, ensure plat_data is zero-initialized in
dw_hdmi_qp_rockchip_bind().
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm
In order to support the CEC interface of the DesignWare HDMI QP IP
block, setup platform data to include the required IRQ number.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip
dev_err_probe(), which also reduces the code a bit.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 62 ++
1 file changed, 24 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
b/drivers/gpu/drm
CEC IRQ number to be provided by the platform driver.
Co-developed-by: Algea Cao
Signed-off-by: Algea Cao
Co-developed-by: Derek Foreman
Signed-off-by: Derek Foreman
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/Kconfig | 8
: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 11 ---
include/drm/bridge/dw_hdmi_qp.h | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
index
ec-helper-unreg-fix-v1-1-7e7b0eb57...@collabora.com/
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
- Collected R-b tag from Dmitry
- Restructured the generic bridge patches to not depend on the
platform-specific changes and updated cover letter accordingly (Heiko)
- Replaced the loop sear
Hi Maxime,
On 7/4/25 6:07 PM, Maxime Ripard wrote:
> On Fri, Jul 04, 2025 at 05:23:24PM +0300, Cristian Ciocaltea wrote:
>> In order to support correct initialization of the timer base in the HDMI
>> QP IP block, extend the platform data to provide the necessary referenc
Hi Heiko,
On 7/4/25 5:37 PM, Heiko Stübner wrote:
> Hi Cristian,
>
> Am Freitag, 4. Juli 2025, 16:23:22 Mitteleuropäische Sommerzeit schrieb
> Cristian Ciocaltea:
>> In preparation to support the CEC interface of the DesignWare HDMI QP IP
>> block, extend the plat
In order to support correct initialization of the timer base in the HDMI
QP IP block, extend the platform data to provide the necessary reference
clock rate.
While at it, ensure plat_data is zero-initialized in
dw_hdmi_qp_rockchip_bind().
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm
Enable support for the CEC interface of the Synopsys DesignWare HDMI QP
IP block.
This is used by all boards based on RK3588 & RK3576 SoCs.
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/
lower, i.e. 396.00 MHz, and
the incorrect register configuration breaks CEC functionality.
Set the timer base according to the actual reference clock rate. While
at it, also drop the unnecessary empty lines in dw_hdmi_qp_init_hw().
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge
: Derek Foreman
Signed-off-by: Derek Foreman
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/Kconfig | 8 +
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 220 +++
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.h | 14 ++
3 files changed, 242
In preparation to support the CEC interface of the DesignWare HDMI QP IP
block, extend the platform data to provide the required IRQ number.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 4
include/drm/bridge/dw_hdmi_qp.h| 1 +
2
test conditions. I've already submitted a patch [1] that
seems to correct the problem.
[1]
https://lore.kernel.org/all/20250703-hdmi-cec-helper-unreg-fix-v1-1-7e7b0eb57...@collabora.com/
Signed-off-by: Cristian Ciocaltea
---
Cristian Ciocaltea (5):
drm/rockchip: dw_hdmi_qp: Provide C
Correct the kernel-doc comment for DRM_BRIDGE_OP_HDMI_CEC_ADAPTER member
of enum drm_bridge_ops. This seems to be just a copy-paste artifact
from DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER above.
Signed-off-by: Cristian Ciocaltea
---
include/drm/drm_bridge.h | 2 +-
1 file changed, 1 insertion(+), 1
DRM_BRIDGE_OP_HDMI_AUDIO and DRM_BRIDGE_OP_HDMI_CEC_ADAPTER bridge
ops only when the aforementioned kernel config options have been
enabled.
Fixes: ae01d3183d27 ("drm/bridge: adv7511: switch to the HDMI connector
helpers")
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/adv7511/adv7511
cec_unregister_adapter() instead of
cec_delete_adapter() in the managed release action handler.
Fixes: 8b1a8f8b2002 ("drm/display: add CEC helpers code")
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_cec_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
ts the value to the mask
> (like FIELD_PREP et al do), a lot of macro instantiations get easier to
> read.
>
> This was tested on an RK3568 ODROID M1, as well as an RK3399 ROCKPro64.
>
> Signed-off-by: Nicolas Frattaroli
This again LGTM and I could verify the RK3568 related bit
(RK3588). Will also
verify on RK3576 as soon as I get a board (expected next week).
Reviewed-by: Cristian Ciocaltea
Tested-by: Cristian Ciocaltea
B (RK3588). Hence,
Reviewed-by: Cristian Ciocaltea
Tested-by: Cristian Ciocaltea
Hi Nicolas,
On 6/12/25 3:13 PM, Nicolas Frattaroli wrote:
> On Wednesday, 11 June 2025 23:47:46 Central European Summer Time Cristian
> Ciocaltea wrote:
>> Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
>> char rate via phy_configure_opts_hdmi"
On 6/12/25 1:22 PM, Piotr Oniszczuk wrote:
>
>
>> Wiadomość napisana przez Cristian Ciocaltea
>> w dniu 11 cze 2025, o godz. 23:47:
>>
>> Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
>> char rate via phy_configure_opts_hdmi"
Hi Detlev,
On 6/12/25 3:00 AM, Detlev Casanova wrote:
> Hi Cristian,
>
> On Wednesday, 11 June 2025 17:47:49 EDT Cristian Ciocaltea wrote:
>> Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
>> char rate via phy_configure_opts_hdmi"), the wo
t been mainlined yet.
Fixes: d74b842cab08 ("arm64: dts: rockchip: Add vop for rk3576")
Cc: sta...@vger.kernel.org
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/boot/dts/rockchip/rk3576.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rock
tags to facilitate
backporting.
Fixes: c3b7c5a4d7c1 ("dt-bindings: display: vop2: Add rk3576 support")
Cc: sta...@vger.kernel.org
Signed-off-by: Cristian Ciocaltea
---
.../bindings/display/rockchip/rockchip-vop2.yaml | 56 +-
1 file changed, 44 insertions(+), 12
: ad0ea230ab2a ("arm64: dts: rockchip: Add hdmi for rk3576")
Cc: sta...@vger.kernel.org
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/boot/dts/rockchip/rk3576.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
b/arch/arm64/boot/dts/rockc
is to make use of the HDMI PHY PLL as a more accurate DCLK
source in VOP2.
It's worth noting a follow-up patch is going to drop the hack from the
bridge driver altogether, while switching to HDMI PHY configuration API
for setting up the TMDS character rate.
Signed-off-by: Cristian Cio
On 6/2/25 12:09 PM, Maxime Ripard wrote:
> On Mon, Jun 02, 2025 at 11:05:16AM +0200, Maxime Ripard wrote:
>> On Tue, 27 May 2025 15:11:08 +0300, Cristian Ciocaltea wrote:
>>> Provide the basic support to enable using YUV420 as an RGB fallback when
>>> computing the b
Replace 'const char *' with 'const void *' type for current_edid member
in struct drm_atomic_helper_connector_hdmi_priv, as well as for the edid
parameter of set_connector_edid() function.
Suggested-by: Jani Nikula
Signed-off-by: Cristian Ciocaltea
---
d
Improve consistency throughout drm_hdmi_state_helper_test.c by replacing
the two occurrences of '[_]MHz' substring with 'mhz'.
As a bonus, this also helps getting rid of checkpatch.pl complaint:
CHECK: Avoid CamelCase:
Reviewed-by: Dmitry Baryshkov
Signed-off-by
In preparation to extend the max TMDS rate fallback tests for covering
YUV420 output, update the rather generic function names
drm_test_check_max_tmds_rate_{bpc|format}_fallback() to properly
indicate the intended test cases.
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
Provide tests to verify drm_atomic_helper_connector_hdmi_check() helper
fallback behavior when using YUV420 output format.
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 154 +
1 file changed, 154
rly setup.
Reviewed-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
b/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
in
the potential EDEADLK error
returned by the former helper, which would require restarting the entire
atomic sequence.
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions
Provide tests to verify that drm_atomic_helper_connector_hdmi_check()
helper behaviour when using YUV420 output format is to always set the
limited RGB quantization range to 'limited', no matter what the value of
Broadcast RGB property is.
Acked-by: Maxime Ripard
Signed-off-by
Create a test EDID advertising the following capabilities:
Max resolution: 3840x2160@30Hz with RGB, YUV444, YUV422, YUV420
Max BPC:16 for all modes
Max TMDS clock: 340 MHz
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_kunit_edid.h | 114
Try to make use of YUV420 when computing the best output format and
RGB cannot be supported for any of the available color depths.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_state_helper.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions
Provide the necessary constraints verification in
sink_supports_format_bpc() in order to support handling of YUV420
output format.
Reviewed-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_state_helper.c | 39 +++--
1 file changed, 36
Provide test to verify a mandatory fallback to YUV420 output cannot
succeed when driver doesn't advertise YUV420 support.
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 87 ++
1 file changed, 87 inser
dropping the
open coded EDID setup from all test cases.
The actual conversion will be handled separately; for now just apply it
to drm_kunit_helper_connector_hdmi_init() helper.
Reviewed-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 46
Provide the basic support to enable using YUV420 as an RGB fallback when
computing the best output format and color depth.
Signed-off-by: Cristian Ciocaltea
---
Changes in v5:
- Collected R-b/A-b tags from Maxime and Dmitry
- Got rid of the condition inversion in "drm/connector: hdmi: Use Y
Add the missing 'bpc' string to the debug message indicating the
supported format identified within hdmi_try_format_bpc() helper.
Reviewed-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_state_helper.c | 2 +-
1 file changed, 1 insertion(+),
hdmi_compute_config() to
ensure the verification is done on the updated output format.
Fixes: 027d43590649 ("drm/connector: hdmi: Add RGB Quantization Range to the
connector state")
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_state_he
Create a test EDID advertising the following capabilities:
Max resolution:
- 1920x1080@60Hz with RGB, YUV444, YUV422
- 3840x2160@30Hz with YUV420 only
Max BPC: 16 for all modes
Max TMDS clock: 200 MHz
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm
After updating the code to make use of the new EDID setup helper,
drm_kunit_helper_connector_hdmi_init_funcs() became unused, hence drop
it.
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c | 10 --
1 file changed, 10
Make use of the recently introduced macros to reduce boilerplate code
around EDID setup. This also helps dropping the redundant calls to
set_connector_edid().
No functional changes intended.
Acked-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/tests
any functional changes.
Reviewed-by: Maxime Ripard
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/display/drm_hdmi_state_helper.c | 60 -
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_hdmi_state_helper.c
b/drivers/gpu
The very first debug message in hdmi_try_format_bpc() is incomplete, as
it doesn't provide the given bpc in addition to the tried format.
Add the missing debug information and drop the now redundant message
from hdmi_compute_config().
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Cri
Hi Maxime,
On 5/22/25 7:16 PM, Maxime Ripard wrote:
> Hi,
>
> On Mon, May 19, 2025 at 01:55:10PM +0300, Cristian Ciocaltea wrote:
>> On 5/19/25 11:42 AM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Fri, Apr 25, 2025 at 01:27:14PM +0300, Cristian Ciocaltea wr
On 5/22/25 7:06 PM, Maxime Ripard wrote:
> On Mon, May 19, 2025 at 01:35:46PM +0300, Cristian Ciocaltea wrote:
>> On 5/19/25 10:22 AM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Fri, Apr 25, 2025 at 01:27:05PM +0300, Cristian Ciocaltea wrote:
>>>> In
On 5/19/25 11:42 AM, Maxime Ripard wrote:
> Hi,
>
> On Fri, Apr 25, 2025 at 01:27:14PM +0300, Cristian Ciocaltea wrote:
>> Provide a test to verify that if both driver and screen support RGB and
>> YUV420 formats, drm_atomic_helper_connector_hdmi_check() cannot succeed
&g
On 5/19/25 10:22 AM, Maxime Ripard wrote:
> Hi,
>
> On Fri, Apr 25, 2025 at 01:27:05PM +0300, Cristian Ciocaltea wrote:
>> In preparation to improve error handling throughout all test cases,
>> introduce a macro to check for EDEADLK and automate the restart of the
>> at
Hi Maxime,
On 5/16/25 4:15 PM, Maxime Ripard wrote:
> Hi,
>
> On Fri, Apr 25, 2025 at 01:27:03PM +0300, Cristian Ciocaltea wrote:
>> Provide a wrapper over drm_kunit_helper_enable_crtc_connector() to
>> automatically handle EDEADLK.
>>
>> This is going to hel
Hi Maxime,
On 5/13/25 4:35 PM, Maxime Ripard wrote:
> Hi,
>
> On Fri, Apr 25, 2025 at 01:26:57PM +0300, Cristian Ciocaltea wrote:
>> Try to make use of YUV420 when computing the best output format and
>> RGB cannot be supported for any of the available color depths.
>>
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