Hi Dave & Sima,
Here goes the drm-intel-fixes PR towards v6.16-rc4.
Two Cc stable fixes, fix for HDMI 1080p@120Hz and DP AUX DPCD probing.
Then a followup build fix for GCOV + AutoFDO configs.
Regards, Joonas
***
drm-intel-fixes-2025-06-26:
- Fix for SNPS PHY HDMI for 1080p@120Hz
- Correct DP
Hi Prabhakar,
Thanks for the patch.
> -Original Message-
> From: Prabhakar
> Sent: 30 May 2025 18:19
>
> Subject: [PATCH v6 3/4] dt-bindings: display: bridge: renesas,dsi: Add
> support for RZ/V2H(P) SoC
>
> From: Lad Prabhakar
>
> The MIPI DSI interface on the RZ/V2H(P) SoC is nearl
On 6/25/2025 5:15 AM, Dmitry Baryshkov wrote:
> On Tue, Jun 24, 2025 at 04:38:25PM +0100, Greg KH wrote:
>> On Tue, Jun 24, 2025 at 04:36:35PM +0100, Greg KH wrote:
>>> On Tue, Jun 24, 2025 at 04:27:21PM +0300, Dmitry Baryshkov wrote:
On Thu, Jun 19, 2025 at 10:40:26AM +0530, Ekansh Gupta w
On 6/25/25 12:22 AM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20250624:
>
on i386, when both CONFIG_DRM_XE=y
and CONFIG_DRM_I915=y:
ld: drivers/gpu/drm/xe/xe_pcode.o: in function `intel_pcode_read':
xe_pcode.c:(.text+0x7d0): multiple definition of `intel_pcode_read';
drivers/gpu/
> -Original Message-
> From: Nilawar, Badal
> Sent: Wednesday, June 25, 2025 10:30 PM
> To: intel...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> ker...@vger.kernel.org
> Cc: Gupta, Anshuman ; Vivi, Rodrigo
> ; Usyskin, Alexander ;
> gre...@linuxfoundation.org; Cerao
Hi Beata,
On Wed, Jun 25, 2025 at 10:13:33AM +0200, Beata Michalska wrote:
> With the Opaque, the expectations are that Rust should not
> make any assumptions on the layout or invariants of the wrapped
> C types. That runs rather counter to ioctl arguments, which must
> adhere to certain data-layo
Hi Konrad,
kernel test robot noticed the following build errors:
[auto build test ERROR on 2ae2aaafb21454f4781c30734959cf223ab486ef]
url:
https://github.com/intel-lab-lkp/linux/commits/Konrad-Dybcio/soc-qcom-Add-UBWC-config-provider/20250625-211253
base
在 2025/6/24 20:23, Matthew Wilcox 写道:
On Tue, Jun 24, 2025 at 12:12:04PM +, 陈涛涛 Taotao Chen wrote:
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -637,8 +637,7 @@ i915_gem_object_create_shmem_from_data(struct
drm_i915_private *i915,
{
struct drm_i915_gem_object *obj;
在 2025/6/24 20:53, Matthew Wilcox 写道:
On Tue, Jun 24, 2025 at 12:12:10PM +, 陈涛涛 Taotao Chen wrote:
From: Taotao Chen
Set the FOP_DONTCACHE flag in ext4_file_operations to indicate that
ext4 supports IOCB_DONTCACHE handling in buffered write paths.
I think this patch should be combined wi
The panel allocation in panel_simple_probe() breaks due to not having
the panel desc for DPI panels. DPI panels gets probed much later.
Currently driver is checking for desc == &panel_dpi to do the DPI
specific panel desc allocations. This looks hacky.
This patch does the following:
- Rename pan
On Tue Jun 24, 2025 at 5:27 PM CEST, Alice Ryhl wrote:
> In the previous patch we added Opaque::cast_from() that performs the
> opposite operation to Opaque::raw_get(). For consistency with this
> naming, rename raw_get() to cast_from().
>
> There are a few other options such as calling cast_from()
Pierre-Yves, Alain,
On Mon, Jun 16, 2025 at 10:53:53AM +0200, Clément Le Goffic wrote:
> This patch series aims to fix some issues inside the driver's DMA
> handling.
> It also uses newer I2C DMA API.
>
> Signed-off-by: Clément Le Goffic
> ---
> Clément Le Goffic (3):
> i2c: stm32: fix the
Hi Arnd,
On 6/25/25 17:20, Sam Ravnborg wrote:
Hi Arnd.
I remember I stared at this code before, good to see it gone.
There is a bit more tidiying up you can do.
Also, I suggest to split it in two patches, it itches me to see the
driver specific part mixed up with the fb_notify removal.
I as
Include to declare device_property_read_u32() and
struct of_device_id. Avoids dependency on backlight header to include
it.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Janne Grunau
---
drivers/gpu/drm/panel/panel-summit.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/pa
From: Sandeep Sheriker M
The LVDS controller was hardcoded to JEIDA mapping, which leads to
distorted output on panels expecting VESA mapping.
Update the driver to dynamically select the appropriate mapping and
pixel size based on the panel's advertised media bus format. This
ensures compatibili
On Wed, 25 Jun 2025 14:18:28 + "Kasireddy, Vivek"
wrote:
> > Cool, thanks, I'll paste that into the changelog ;)
> >
> > So if this code path is rare but expected and normal, should we be
> > emitting this warning at all?
> I think it would be OK to drop the warning. Otherwise, Syzbot would
On Tue, Jun 24, 2025 at 12:12:08PM +, 陈涛涛 Taotao Chen wrote:
> -static int blkdev_write_end(struct file *file, struct address_space *mapping,
> +static int blkdev_write_end(struct kiocb *iocb, struct address_space
> *mapping,
> loff_t pos, unsigned len, unsigned copied, struct fo
Extract and print version info of the late binding binary.
v2: Some refinements (Daniele)
Signed-off-by: Badal Nilawar
---
drivers/gpu/drm/xe/xe_late_bind_fw.c | 124 +
drivers/gpu/drm/xe/xe_late_bind_fw_types.h | 3 +
drivers/gpu/drm/xe/xe_uc_fw_abi.h | 66
From: Konrad Dybcio
As discussed a lot in the past, the UBWC config must be coherent across
a number of IP blocks (currently display and GPU, but it also may/will
concern camera/video as the drivers evolve).
So far, we've been trying to keep the values reasonable in each of the
two drivers separ
Hi Alex,
Em 16/06/2025 03:59, Christian König escreveu:
Acked-by: Christian König for the series.
Can you add this series to amd-staging-drm-next? Thanks!
On 6/13/25 20:26, André Almeida wrote:
Commit 7d95680d64ac ("scripts/misc-check: check unnecessary #include
when W=1") and commit a93
The drm_sched_job_unschedulable trace point can access
entity->dependency after it was cleared by the callback
installed in drm_sched_entity_add_dependency_cb, causing:
BUG: kernel NULL pointer dereference, address: 0020
Workqueue: comp_1.1.0 drm_sched_run_job_work [gpu_sched]
RIP: 001
From: Taotao Chen
Refactors shmem_pwrite() to replace the ->write_begin/end logic
with a write_iter-based implementation using kiocb and iov_iter.
While kernel_write() was considered, it caused about 50% performance
regression. vfs_write() is not exported for kernel use. Therefore,
file->f_op->w
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, June 24, 2025 10:31 AM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> nouv...@lists.freedesktop.org
> Subject: RE: [PATCH v3 11/13] drm/i915/backlig
On 6/24/25 15:53, Matt Coster wrote:
> On 23/06/2025 12:42, Michal Wilczynski wrote:
>> Update the Imagination PVR DRM driver to leverage the pwrseq framework
>> for managing the power sequence of the GPU on the T-HEAD TH1520 SoC.
>>
>> To cleanly handle the TH1520's specific power requirements
For some reason, some EDIDs used by kunit had Monitor Range Limits
making no sense, and not matching the edid-decode output in the comment.
While they were in the comments as:
Display Range Limits:
Monitor ranges (GTF): 50-70 Hz V, 30-70 kHz H, max dotclock 150 MHz
They were actually:
Not something that is likely to be scanned out, but GPUs usually support
half-float formats with 1, 2, or possibly 3 components, and it is useful
to be able to import/export them with a valid fourcc, and/or use gbm to
create them.
These correspond to PIPE_FORMAT_{R16,R16G16,R16G16B16}_FLOAT in mes
For some reason, the HDMI VSDBs in our kunit EDIDs had a length longer
than expected.
While this was harmless, we should get rid of it to make it somewhat
predictable.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/tests/drm_kunit_edid.h | 85 --
1 file changed
Hi, Icenowy:
Icenowy Zheng 於 2025年5月31日 週六 下午8:12寫道：
>
> Currently even the SoC's OVL does not declare the support of AFBC, AFBC
> is still announced to the userspace within the IN_FORMATS blob, which
> breaks modern Wayland compositors like KWin Wayland and others.
>
> Gate passing modifiers to
Avoid dereferencing struct drm_gem_object.import_attach for the
imported dma-buf. The dma_buf field in the GEM object instance refers
to the same buffer. Prepares to make import_attach an implementation
detail of PRIME.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_b
Some of our EDIDs are (rightfully) invalid, but most of them should be
valid.
Let's add the edid-decode --check of these EDIDs when they were
generated, so we know what to expect going forward, and a comment to
explicitly mention when we expect them to be broken.
Signed-off-by: Maxime Ripard
---
Hi,
On Fri 21 Feb 25, 17:17, Kuba Szczodrzyński wrote:
> The sun4i TCON needs a reference to the D-PHY in order to support LVDS
> on Allwinner D1s/T113.
>
> Signed-off-by: Kuba Szczodrzyński
> ---
> arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
>
Hi,
Some comments below.
On Fri 21 Feb 25, 17:17, Kuba Szczodrzyński wrote:
> On Allwinner chips with a combo D-PHY, the TCON LCD0 should fetch it
> from device tree, in order to enable LVDS. Since the PHY also needs to
> be powered off to disable LVDS, add a function to the quirks.
>
> Signed-o
Hi Arnd.
I remember I stared at this code before, good to see it gone.
There is a bit more tidiying up you can do.
Also, I suggest to split it in two patches, it itches me to see the
driver specific part mixed up with the fb_notify removal.
Sam
On Wed, Jun 25, 2025 at 03:12:22PM +0200,
This op does not pass any pointer to the DSI device, so the DSI host driver
cannot store it.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gp
The callbacks in struct dw_mipi_dsi2_host_ops have a struct mipi_dsi_device
pointer to the device, which is unused. Remove it as a step towards
avoiding DSI host drivers to hold a pointer to the DSI device.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c | 4 ++-
Reload late binding fw during resume from system suspend
v2:
- Unconditionally reload late binding fw (Rodrigo)
- Flush worker during system suspend
Cc: Rodrigo Vivi
Signed-off-by: Badal Nilawar
---
drivers/gpu/drm/xe/xe_pm.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/
Hi,
On Fri, Jun 20, 2025 at 12:50 AM Bartosz Golaszewski wrote:
>
> From: Bartosz Golaszewski
>
> As of commit 92ac7de3175e3 ("gpiolib: don't allow setting values on input
> lines"), the GPIO core makes sure values cannot be set on input lines.
> Remove the unnecessary check.
>
> Signed-off-by:
On 18.04.25 18:48, Jocelyn Falempe wrote:
> On 32bits ARM, u64/u64 is not supported [1], so change the algorithm
> to use a simple fifo with decimal digits as u8 instead.
> This is slower but should compile on all architecture.
>
> Link:
> https://lore.kernel.org/dri-devel/caniq72ke45eowckmhwhvmw
On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements 4-Tiling support, to still be able to draw
the panic screen.
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/i915/display/intel_plane.c | 20
1 file changed, 20 ins
On 25/06/25 12:24 pm, Maxime Ripard wrote:
> On Wed, Jun 25, 2025 at 10:26:10AM +0530, Dharma Balasubiramani wrote:
>> Replace legacy .enable and .disable callbacks with their atomic
>> counterparts .atomic_enable and .atomic_disable.
>>
>> Also, add turn off the serialiser inside atomic_disable().
On 23/06/2025 12:42, Michal Wilczynski wrote:
> Update the img,powervr-rogue.yaml to include the T-HEAD TH1520 SoC's
> specific GPU compatible string.
>
> The thead,th1520-gpu compatible, along with its full chain
> img,img-bxm-4-64, and img,img-rogue, is added to the
> list of recognized GPU type
This op does not pass any pointer to the DSI device, so the DSI host driver
cannot store it.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_d
These lines logged as info are too much, drivers should be mostly silent
when everything works. And now there is an equivalent dbg line logged in
mipi_dsi_attach(), valid for all DSI hosts.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/mcde/mcde_dsi.c | 6 --
1 file changed, 6 deletions(-
The MCDE driver stores a struct mipi_dsi_device pointer in struct mcde for
two uses: sending commands via mcde_dsi_te_request() and accessing the DSI
bus format parameters (lanes, channel etc).
We want to get rid of mipi_dsi_device pointers in host drivers. This patch
removes the first usage by ad
The runtime PM might be left in error state if one of the callbacks
returned an error, e.g. if the (auto)suspend callback failed following
a firmware crash.
When that happens, any further attempt to acquire or release a power
reference will then also fail, making it impossible to do anything else
Samsung S6E8AA5X01 is an AMOLED MIPI DSI panel controller. Implement
a basic panel driver for such panels.
The driver also initializes a backlight device, which works by changing
the panel's gamma values and aid brightness levels appropriately, with
the help of look-up tables acquired from downstr
On 18/06/2025 15:47, Maíra Canal wrote:
When a CL/CSD job times out, we check if the GPU has made any progress
since the last timeout. If so, instead of resetting the hardware, we skip
the reset and allow the timer to be rearmed. This gives long-running jobs
a chance to complete.
Instead of ma
Drop the drm_panel field of the mchp_lvds struct as it is unused.
Signed-off-by: Dharma Balasubiramani
---
drivers/gpu/drm/bridge/microchip-lvds.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c
b/drivers/gpu/drm/bridge/microchip-lvds.c
index 9f
Hi,
Some comments below.
On Fri 21 Feb 25, 17:17, Kuba Szczodrzyński wrote:
> The Allwinner D1s/T113 needs to use the combo D-PHY to enable LVDS
> output.
>
> Enable LVDS support in the TCON and configure it using the PHY.
>
> Signed-off-by: Kuba Szczodrzyński
> ---
> drivers/gpu/drm/sun4i/su
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, June 24, 2025 10:31 AM
> To: Kandpal, Suraj ; intel...@lists.freedesktop.org;
> intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> nouv...@lists.freedesktop.org
> Subject: RE: [PATCH v3 11/13] drm/i915/backlig
off the serialiser.
- Link to v5:
https://lore.kernel.org/r/20250625-microchip-lvds-v5-0-624cf72b2...@microchip.com
Changes in v5:
- Drop the redundant port node lookup.
- Split the commits adding atomic bridge ops into 2.
- Update commit messages accordingly.
- Link to v4:
https
On Sun, Jun 22, 2025 at 07:08:18PM +0530, Ling Xu wrote:
> Add "gdsp" as the new supported label for GDSP fastrpc domain.
Neither this commit, nor second nor third explain what is GDSP...
Best regards,
Krzysztof
On Tue, Jun 24, 2025 at 12:12:04PM +, 陈涛涛 Taotao Chen wrote:
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
> @@ -637,8 +637,7 @@ i915_gem_object_create_shmem_from_data(struct
> drm_i915_private *i915,
> {
> struct drm_i915_gem_object *obj;
> struct file *file;
> - const st
On Tue, Jun 24, 2025 at 4:10 PM Bartosz Golaszewski wrote:
>
> From: Bartosz Golaszewski
>
> Here's an immutable tag containing the thead 1520 power sequencing driver
> for the drm and pmdomain trees to pull from.
>
> Best Regards,
> Bartosz Golaszewski
Just an FYI - there don't seem to be any a
On 4/9/25 12:33 PM, Sakari Ailus wrote:
The local variable dev points to drm->dev already, use dev directly.
Signed-off-by: Sakari Ailus
---
Hi folks,
The background is that I'll be using a Coccinelle spatch soon to remove
(most) pm_runtime_mark_last_busy() calls. That won't work if the argume
On Tue, Jun 24, 2025 at 12:12:10PM +, 陈涛涛 Taotao Chen wrote:
> From: Taotao Chen
>
> Set the FOP_DONTCACHE flag in ext4_file_operations to indicate that
> ext4 supports IOCB_DONTCACHE handling in buffered write paths.
I think this patch should be combined with the previous patch so we
see al
Hmm, this has an issue
[..]
>
> +impl, T> Drop for MmInner {
> +fn drop(&mut self) {
> +// SAFETY: If the MmInner is dropped then all nodes are gone (since
> they hold references),
> +// so it is safe to tear down the allocator.
> +unsafe {
> +bindings::d
There was an error pointer vs NULL bug in __igt_breadcrumbs_smoketest().
The __mock_request_alloc() function implements the
smoketest->request_alloc() function pointer. It was supposed to return
error pointers, but it propogates the NULL return from mock_request()
so in the event of a failure, it
Hi Miguel
> On 25 Jun 2025, at 09:47, Miguel Ojeda
> wrote:
>
> On Tue, Jun 24, 2025 at 12:13 AM Daniel Almeida
> wrote:
>>
>> Signed-off-by: Asahi Lina
>
> Patches from others also need to be signed off by you as carrier.
Thanks for catching that. This was indeed forgotten on this patch.
The field import_attach of struct drm_gem_object is often only
required by PRIME code. In other places, replace its use with
clearer alternatives.
v2:
- keep amdgpu_bo_print_info() as-is (Christian)
Thomas Zimmermann (2):
drm/amdgpu: Test for imported buffers with drm_gem_is_imported()
drm/am
From: Konrad Dybcio
This bit is set iff the UBWC version is 1.0. That notably does not
include QCM2290's "no UBWC".
This commit is intentionally cross-subsystem to ease review, as the
patchset is intended to be merged together, with a maintainer
consensus.
Reviewed-by: Dmitry Baryshkov
Signed-
On Wed, Jun 25, 2025 at 9:55 PM Christian König
wrote:
>
> On 24.06.25 03:12, David Airlie wrote:
> > On Mon, Jun 23, 2025 at 6:54 PM Christian König
> > wrote:
> >>
> >> On 6/19/25 09:20, Dave Airlie wrote:
> >>> From: Dave Airlie
> >>>
> >>> While discussing memcg intergration with gpu memory
Replace legacy .enable and .disable callbacks with their atomic
counterparts .atomic_enable and .atomic_disable.
Signed-off-by: Dharma Balasubiramani
---
drivers/gpu/drm/bridge/microchip-lvds.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/
On 6/25/25 15:55, Krzysztof Kozlowski wrote:
> On 25/06/2025 14:45, Michal Wilczynski wrote:
>>
>>
>> On 6/24/25 15:53, Matt Coster wrote:
>>> On 23/06/2025 12:42, Michal Wilczynski wrote:
Update the img,powervr-rogue.yaml to include the T-HEAD TH1520 SoC's
specific GPU compatible stri
This op does not pass any pointer to the DSI device, so the DSI host driver
cannot store it.
This driver uses the DSI device format parameters in various places outside
the .attach op, and currently it does so by storing a pointer to the struct
mipi_dsi_device in two places: struct mcde and struct
On Mon, 16 Jun 2025 11:21:01 +0200, Clément Le Goffic wrote:
> This series aims to improve the STM32 SPI driver in different areas.
> It adds SPI_READY mode, fixes an issue raised by a kernel bot,
> add the ability to use DMA-MDMA chaining for RX and deprecate an ST bindings
> vendor property.
>
>
Hi Mario,
kernel test robot noticed the following build errors:
[auto build test ERROR on pci/next]
[also build test ERROR on pci/for-linus tiwai-sound/for-next
tiwai-sound/for-linus tip/x86/core linus/master v6.16-rc3 next-20250625]
[If your patch is applied to the wrong git tree, kindly drop
Hi Mike,
On Tue, 24 Jun 2025 13:45:15 +0200
Mike Looijmans wrote:
> The datasheet advises to wait 5ms after starting the video stream before
> resetting the error registers. The driver only waits 1ms. Change the
> sequence to match the datasheet:
> - Turn on the DSI
> - Wait 5ms
> - Write 0xFF t
On 2025-06-25 15:08, Rob Herring wrote:
On Wed, Jun 25, 2025 at 03:38:44PM +0530, Kaustabh Chakraborty wrote:
Document the driver for Synaptics TDDI (Touch/Display Integration)
panels.
We document the h/w, not 'the driver'.
Along with the MIPI-DSI panel, these devices also have an in-built L
From: Mario Limonciello
Several places in the kernel do class shifting to match whether a
PCI device is display class. Introduce a helper for those places to
use.
Reviewed-by: Daniel Dadap
Reviewed-by: Simona Vetter
Signed-off-by: Mario Limonciello
---
include/linux/pci.h | 15 +
On 2025/6/19 19:33, Dmitry Baryshkov wrote:
[initially I responded off-list by mistake, sorry for the confusion and
possible duplicates]
On 19/06/2025 12:26, Yongxing Mou wrote:
On 2025/6/16 22:41, Dmitry Baryshkov wrote:
On 16/06/2025 17:09, Yongxing Mou wrote:
On 2025/6/11 22:31, Dm
TIDSS uses crtc_* fields to propagate its registers and set the
clock rates. So set the CRTC modesetting timing parameters with
the adjusted mode when needed, to set correct values.
Cc: Tomi Valkeinen
Signed-off-by: Jayesh Choudhary
---
Hello All,
After the DSI fixes[0], TIDSS is using crtc_*
On Mon, Jun 23, 2025 at 10:17:36AM +0200, Michal Wilczynski wrote:
> Hi,
>
> Apologies for the late reply, it was a long weekend in Poland and I was
> away without access to e-mail.
>
> This is the Imagination repository that hosts the firmware [1].
> Admittedly I'm not using the newest firmware
Include to declare struct device_node and include
to declare struct of_device_id. Avoids
dependency on backlight header to include it.
Signed-off-by: Thomas Zimmermann
---
drivers/video/backlight/rave-sp-backlight.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/video/backlight/
Include to declare device_property_read_bool(). Avoids
dependency on backlight header to include it.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams427ap24.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/pan
On Tue, Jun 24, 2025 at 10:46:26AM +, dharm...@microchip.com wrote:
> On 24/06/25 4:12 pm, Laurent Pinchart wrote:
> > On Tue, Jun 24, 2025 at 02:54:14PM +0530, Dharma Balasubiramani wrote:
> >> Drop the drm_panel field of the mchp_lvds struct as it is unused.
> >>
> >> Signed-off-by: Dharma Ba
From: Mario Limonciello
On systems with non VGA GPUs fbcon can't find the primary GPU because
video_is_primary_device() only checks the VGA arbiter.
Add a screen info check to video_is_primary_device() so that callers
can get accurate data on such systems.
Suggested-by: Thomas Zimmermann
Signe
Hi,
On 25-Jun-25 4:33 PM, Lukas Wunner wrote:
> On Wed, Jun 25, 2025 at 04:08:38PM +0200, Hans de Goede wrote:
>> Lukas made me aware of this attempt to fix the KERN_CRIT msg, because
>> I wrote a slightly different patch to fix this:
>>
>> https://lore.kernel.org/dri-devel/20250625112411.4123-1-h
From: Mario Limonciello
The inline pci_is_display() helper does the same thing. Use it.
Reviewed-by: Takashi Iwai
Reviewed-by: Daniel Dadap
Reviewed-by: Simona Vetter
Suggested-by: Bjorn Helgaas
Signed-off-by: Mario Limonciello
---
sound/hda/hdac_i915.c | 2 +-
sound/pci/hda/hda_intel
From: Mario Limonciello
The inline pci_is_display() helper does the same thing. Use it.
Acked-by: Alex Williamson
Reviewed-by: Daniel Dadap
Reviewed-by: Simona Vetter
Suggested-by: Bjorn Helgaas
Signed-off-by: Mario Limonciello
---
drivers/vfio/pci/vfio_pci_igd.c | 3 +--
1 file changed,
This patch series drops the unsed panel field, switches to atomic variants
and adds support to select between the two supported formats (JEIDA and
VESA) by the LVDSC.
Signed-off-by: Dharma Balasubiramani
---
Changes in v4:
- Split the commits into 3.
- Drop
- Link to v3:
https://lore.kernel.org
On Fri, 20 Jun 2025, Suraj Kandpal wrote:
> This series modifies drm dp edp helpers so that drivers can now use them
> to manipulate brightness using luminance value via the
> PANEL_TARGET_LUMINANCE_VALUE register. This feature was
> introduced frin eDP 1.5.
>
> Signed-off-by: Suraj Kandpal
>
> S
Hi Andrew,
> Subject: Re: [PATCH] mm/hugetlb: Don't crash when allocating a folio if
> there are no resv
>
> On Thu, 19 Jun 2025 05:30:52 + "Kasireddy, Vivek"
> wrote:
>
> > Hi Andrew, Anshuman,
> >
> > > Subject: Re: [PATCH] mm/hugetlb: Don't crash when allocating a folio if
> there
> > >
On 2025-06-06 7:28 am, Tomeu Vizoso wrote:
Add the bindings for the Neural Processing Unit IP from Rockchip.
v2:
- Adapt to new node structure (one node per core, each with its own
IOMMU)
- Several misc. fixes from Sebastian Reichel
v3:
- Split register block in its constituent subblocks, an
On Thu, Jun 19, 2025 at 10:40:26AM +0530, Ekansh Gupta wrote:
> During rpmsg_probe, fastrpc device nodes are created first, then
> channel specific resources are initialized, followed by
> of_platform_populate, which triggers context bank probing. This
> sequence can cause issues as applications mi
With the conversion to drm_gpuvm, we lost the lazy VMA cleanup, which
means that fb cleanup/unpin when pageflipping to new scanout buffers
immediately unmaps the scanout buffer. This is costly (with tlbinv,
it can be 4-6ms for a 1080p scanout buffer, and more for higher
resolutions)!
To avoid thi
From: Rob Clark
Bump version to signal to userspace that VM_BIND is supported.
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.
A large number of (unsorted or separate) small (<2MB) mappings can cause
a lot of, probably unnecessary, prealloc pages. Ie. a single 4k page
size mapping will pre-allocate 3 pages (for levels 2-4) for the
pagetable. Which can chew up a large amount of unneeded memory. So add
a mechanism to put
From: Rob Clark
This resolves a potential deadlock vs msm_gem_vm_close(). Otherwise for
_NO_SHARE buffers msm_gem_describe() could be trying to acquire the
shared vm resv, while already holding priv->obj_lock. But _vm_close()
might drop the last reference to a GEM obj while already holding the
From: Rob Clark
Make the VM log a bit more useful by providing a reason for the unmap
(ie. closing VM vs evict/purge, etc)
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 20 +++-
drivers/gpu/drm/msm/msm_gem.h | 2 +-
drivers/gpu/
From: Rob Clark
With async VM_BIND, the actual pgtable updates are deferred.
Synchronously, a list of map/unmap ops will be generated, but the
actual pgtable changes are deferred. To support that, split out
op handlers and change the existing non-VM_BIND paths to use them.
Note in particular, t
From: Rob Clark
So we can monitor how many pages are getting preallocated vs how many
get used.
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_trace.h | 14 ++
drivers/gpu/drm/msm/msm_iommu.c | 4
2 files changed, 18 insertions(+)
diff
From: Rob Clark
Similar to the previous commit, add support for dumping partial
mappings.
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.h | 10 -
drivers/gpu/drm/msm/msm_rd.c | 38 ---
2 files changed, 17 insertions(
From: Rob Clark
We'll be re-using these for the VM_BIND ioctl.
Also, rename a few things in the uapi header to reflect that syncobj use
is not specific to the submit ioctl.
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm
From: Rob Clark
With user managed VMs and multiple queues, it is in theory possible to
trigger map/unmap errors. These will (in a later patch) mark the VM as
unusable. But we want to tell the io-pgtable helpers not to spam the
log. In addition, in the unmap path, we don't want to bail early fr
From: Rob Clark
Add a VM_BIND ioctl for binding/unbinding buffers into a VM. This is
only supported if userspace has opted in to MSM_PARAM_EN_VM_BIND.
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c|1 +
drivers/gpu/drm/msm/msm_drv.h|
From: Rob Clark
Any place we wait for a BO to become idle, we should use BOOKKEEP usage,
to ensure that it waits for _any_ activity.
Signed-off-by: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 6 +++---
drivers/gpu/drm/msm/msm_gem_shrinker.c | 2 +-
2 files
From: Rob Clark
Introduce a mechanism to count the worst case # of pages required in a
VM_BIND op.
Note that previously we would have had to somehow account for
allocations in unmap, when splitting a block. This behavior was removed
in commit 33729a5fc0ca ("iommu/io-pgtable-arm: Remove split on
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