https://bugzilla.kernel.org/show_bug.cgi?id=201539
Sergey (serg.korob...@gmail.com) changed:
What|Removed |Added
CC||serg.korob...@gmail.com
https://bugzilla.kernel.org/show_bug.cgi?id=201273
--- Comment #17 from quirin.blae...@freenet.de ---
Bug is still alive: v4.19.5, no patches
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d
Hi Christian,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.20-rc5 next-20181207]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Not used. Remove from RM.
changes in v2:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 6 +-
3 files changed, 4 inser
Definition was removed already. Clean up header declaration.
changes in v2:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
b/dri
Not actively used. Clean up the crtc mixer struct.
changes in v2:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 --
2 files changed, 4 deletions(-)
diff --git a/drivers/g
RM was equipped with reservation tracking structure RSVP
to cache HW reservation of displays for certain clients
where atomic_checks (atomic commit with TEST_ONLY) for all
the displays are called before their respective atomic_commits.
Since DPU doesn't support the sequence anymore, clean up
the su
struct dpu_hw_blk has hw block type info. Remove duplicate
type tracking in struct dpu_rm_hw_blk.
changes in v2:
- remove redundant type in trace api's (Sean Paul)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c| 22 +-
drivers/gpu/drm
hw_mdp block is common for displays. No need
to reserve per display.
changes in v2:
- use IS_ERR for error checking (Jordan Crouse)
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 11 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_rm
First set of clean up patches for DPU resource manager.
Removes/realigns some of the redudant RM interfaces.
Eventual plan is to migrate resource maintenence using
private state objects.
Thanks and Regards,
Jeykumar S
Jeykumar Sankaran (6):
drm/msm/dpu: avoid tracking reservations in RM
drm/
On Fri, 2018-12-07 at 16:57 -0800, Dhinakaran Pandiyan wrote:
> On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Decode the NAK reply fields to make it easier to parse the logs.
>
> A lot better than seeing the error codes.
>
>
> 0-day's found a conflict
On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Decode the NAK reply fields to make it easier to parse the logs.
A lot better than seeing the error codes.
0-day's found a conflicting definition that's missing an undef. With
that addressed,
Reviewed-by: Dhinak
On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make the code a bit easier to read by providing symbolic names
> for the reply_type (ACK vs. NAK). Also clean up some brace stuff
> while at it.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_dp_mst
uh
didn't we fix this weeks ago? with "drm/nouveau: tegra: Call
nouveau_drm_device_init()"
On Fri, 2018-12-07 at 23:31 +, Guillaume Tucker wrote:
> Please find below an automated bisection report for a kernel Oops
> seen during the initialisation of the nouveau GPU driver on
> jet
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: 611882e19aa50e9a46cf6d9ab0a151f9e97dcbd8
commit: b411997efe8f34b22824461b118a6eacae232b9b [500/522] drm/scheduler: Add
drm_sched_suspend/resume_timeout()
config: arm-allmodconfig (attached as .config)
compiler: arm-
On Fri, Dec 07, 2018 at 09:24:10PM +, Russell King wrote:
> The binding document for this device says that all GPIOs are optional,
> but the driver fails to bind on OMAP3 LDP, reporting:
>
> panel-sharp-ls037v7dw01: probe of display failed with error -2
>
> Unfortunately, commit ca8c67dafdb7
Please find below an automated bisection report for a kernel Oops
seen during the initialisation of the nouveau GPU driver on
jetson-tk1.
All the LAVA test jobs for this bisection can be found here:
http://lava.baylibre.com:10080/scheduler/alljobs?length=25&search=lava-bisect-staging-7366#tab
Hi Dave,
More features for 4.21:
amdgpu:
- DC trace support
- More DC documentation
- XGMI hive reset support
- Rework IH interaction with KFD
- Misc fixes and cleanups
amdkfd:
- Limit vram overcommit
- dmabuf support
- Support for doorbell BOs
ttm:
- Support for simultaneous submissions to mul
On 2018-12-07 09:22, Sean Paul wrote:
On Mon, Dec 03, 2018 at 12:27:42PM -0800, Jeykumar Sankaran wrote:
On 2018-12-03 06:21, Sean Paul wrote:
> On Fri, Nov 30, 2018 at 04:21:15PM -0800, Jeykumar Sankaran wrote:
> > On 2018-11-30 12:07, Sean Paul wrote:
> > > On Fri, Nov 30, 2018 at 11:45:55AM -
On Tue, 4 Dec 2018 14:42:27 -0800, Matthias Kaehlcke wrote:
> Allow the PHY drivers to get the ref clock from the DT.
>
> Signed-off-by: Matthias Kaehlcke
> Reviewed-by: Stephen Boyd
> Reviewed-by: Douglas Anderson
> ---
> Chnages in v4:
> - added "Reviewed-by" tags from Stephen and Doug
>
>
On Tue, 4 Dec 2018 10:16:57 -0500, Jonathan Marek wrote:
> This allows controlling which of the 8 lanes are used for 6 bit color.
>
> Signed-off-by: Jonathan Marek
> ---
> v3: removed empty line and added documentation
>
> .../devicetree/bindings/display/msm/mdp4.txt | 2 ++
> .../gpu/drm/ms
On Tue, 4 Dec 2018 10:17:01 -0500, Jonathan Marek wrote:
> Document the new amd,imageon compatible, used for non-qcom hardware that
> uses the drm/msm driver (iMX5).
>
> Signed-off-by: Jonathan Marek
> ---
> Documentation/devicetree/bindings/display/msm/gpu.txt | 4 +++-
> 1 file changed, 3 ins
On Fri, 2018-09-28 at 21:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make sure i2c msgs we're asked to transfer conform to the
> requirements of REMOTE_I2C_READ. We were only checking that the
> last message is a read, but we must also check that the preceding
> messages are all writ
On Fri, 2018-12-07 at 12:45 -0800, Dhinakaran Pandiyan wrote:
> On Fri, 2018-09-28 at 21:03 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > We aren't supposed to force a stop+start between every i2c msg
> > when performing multi message transfers. This should eg. cause
> > the DDC seg
Hi Kieran,
On Friday, 7 December 2018 14:50:47 EET Kieran Bingham wrote:
> On 25/11/2018 14:40, Laurent Pinchart wrote:
> > DU channels are routed to DPAD outputs in an SoC-dependent way. The
> > routing can be fixed (e.g. DU3 to DPAD0 on H3) or configurable (e.g. DU0
> > or DU1 to DPAD0 on D3/E3)
On 2018-12-07 13:50, Sean Paul wrote:
On Fri, Dec 07, 2018 at 01:16:54PM -0800, Abhinav Kumar wrote:
On 2018-12-07 09:16, Sean Paul wrote:
> From: Sean Paul
>
> The irq_control function is called upon encoder enable/disable and turns
> on/off the vblank interrupts. Unfortunately, it enables the
On Fri, Dec 07, 2018 at 01:16:54PM -0800, Abhinav Kumar wrote:
> On 2018-12-07 09:16, Sean Paul wrote:
> > From: Sean Paul
> >
> > The irq_control function is called upon encoder enable/disable and turns
> > on/off the vblank interrupts. Unfortunately, it enables them when the
> > drm code is not
Hi,
On Fri, Dec 7, 2018 at 1:23 PM Abhinav Kumar wrote:
> We posted this patch on top of Andy's tree which we had and this could
> have changed.
>
> We will wait for his response if we need to repost it after rebasing.
Yup, you did it all correctly here. I was more mentioning that there
are a b
https://bugs.freedesktop.org/show_bug.cgi?id=106175
--- Comment #77 from bmil...@gmail.com ---
@Nicholas Kazlauskas
is there anything important in the new patch vs the first one? it fails a hunk
on 4.19 for me
thanks for submiting it to amd-gfx
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On 2018-12-07 12:59, Doug Anderson wrote:
Hi,
On Wed, Dec 5, 2018 at 7:35 PM Abhinav Kumar
wrote:
+&dsi0 {
+ status = "okay";
+ qcom,dual-dsi-mode;
+ qcom,master-dsi;
+ qcom,sync-dual-dsi;
+
+ vdda-supply = <&vdda_mipi_dsi0_1p2>;
+
+ panel@0 {
+
On 2018-12-07 8:30 pm, Souptick Joarder wrote:
On Fri, Dec 7, 2018 at 8:20 PM Robin Murphy wrote:
On 06/12/2018 18:42, Souptick Joarder wrote:
Convert to use vm_insert_range() to map range of kernel
memory to user vma.
Signed-off-by: Souptick Joarder
Tested-by: Heiko Stuebner
Acked-by: Hei
On 2018-12-07 09:16, Sean Paul wrote:
From: Sean Paul
The irq_control function is called upon encoder enable/disable and
turns
on/off the vblank interrupts. Unfortunately, it enables them when the
drm code is not expecting them to be on. As a result, we can get into
nasty locking situations.
On 2018-12-07 7:28 pm, Souptick Joarder wrote:
On Fri, Dec 7, 2018 at 10:41 PM Matthew Wilcox wrote:
On Fri, Dec 07, 2018 at 03:34:56PM +, Robin Murphy wrote:
+int vm_insert_range(struct vm_area_struct *vma, unsigned long addr,
+ struct page **pages, unsigned long page_c
Hi,
On Wed, Dec 5, 2018 at 7:35 PM Abhinav Kumar wrote:
> +&dsi0 {
> + status = "okay";
> + qcom,dual-dsi-mode;
> + qcom,master-dsi;
> + qcom,sync-dual-dsi;
> +
> + vdda-supply = <&vdda_mipi_dsi0_1p2>;
> +
> + panel@0 {
> + compatible = "truly,nt3
On Fri, 2018-09-28 at 21:03 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We aren't supposed to force a stop+start between every i2c msg
> when performing multi message transfers. This should eg. cause
> the DDC segment address to be reset back to 0 between writing
> the segment address a
On Fri, Dec 7, 2018 at 2:11 PM Christian König
wrote:
>
> The fence seqno is now 64bit, fixes build warning.
>
> Signed-off-by: Christian König
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers
Am 07.12.18 um 20:16 schrieb Eric Anholt:
> The entity->dependency can go away completely once we've called
> drm_sched_entity_add_dependency_cb() (if the cb is called before we
> get around to tracing). The tracepoint is more useful if we trace
> every dependency instead of just ones that get cal
On Fri, Dec 7, 2018 at 1:07 PM Jordan Crouse wrote:
>
> On Fri, Dec 07, 2018 at 10:06:56AM -0700, Jordan Crouse wrote:
> > Try to get the interconnect path for the GPU and vote for the maximum
> > bandwidth to support all frequencies. This is needed for performance.
> > Later we will want to scale
The entity->dependency can go away completely once we've called
drm_sched_entity_add_dependency_cb() (if the cb is called before we
get around to tracing). The tracepoint is more useful if we trace
every dependency instead of just ones that get callbacks installed,
anyway, so just do that.
Fixes
The fence seqno is now 64bit, fixes build warning.
Signed-off-by: Christian König
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
index 1fa74226db91..5c489
The pull request you sent on Fri, 7 Dec 2018 11:37:08 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2018-12-07
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/d387ac13ad12194a62d268a6b7a0633ef832f6bd
Thank you!
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https://bugs.freedesktop.org/show_bug.cgi?id=108973
ilia changed:
What|Removed |Added
Hardware|Other |x86-64 (AMD64)
OS|All
https://bugs.freedesktop.org/show_bug.cgi?id=108973
Bug ID: 108973
Summary: The game Evil Twin segfaults when loading saved state.
Product: Mesa
Version: 18.2
Hardware: Other
OS: All
Status: NEW
Severity:
https://bugs.freedesktop.org/show_bug.cgi?id=107826
qnerd changed:
What|Removed |Added
Summary|amdgpu-pro 18.30: Missing |amdgpu-pro 18.30/18.40:
|xser
https://bugs.freedesktop.org/show_bug.cgi?id=107826
--- Comment #1 from qnerd ---
The same is still true for amdgpu-pro version 18.40-x
Would somebody with ties to AMD comment on this?
Is it just an obsolete feature which is not supposed to work?
Removing the paragraph from the current amdgpu-p
On Fri, Dec 07, 2018 at 10:06:56AM -0700, Jordan Crouse wrote:
> Try to get the interconnect path for the GPU and vote for the maximum
> bandwidth to support all frequencies. This is needed for performance.
> Later we will want to scale the bandwidth based on the frequency to
> also optimize for po
Boris Brezillon writes:
> Commit 3e407417b192 ("drm/vc4: Fix X/Y positioning of planes using
> T_TILES modifier") fixed the problem with T_TILES format, but left
> things in a non-working state for SAND formats. Address that now.
>
> Signed-off-by: Boris Brezillon
Reviewed-by: Eric Anholt
si
On Mon, Dec 03, 2018 at 12:27:42PM -0800, Jeykumar Sankaran wrote:
> On 2018-12-03 06:21, Sean Paul wrote:
> > On Fri, Nov 30, 2018 at 04:21:15PM -0800, Jeykumar Sankaran wrote:
> > > On 2018-11-30 12:07, Sean Paul wrote:
> > > > On Fri, Nov 30, 2018 at 11:45:55AM -0800, Jeykumar Sankaran wrote:
>
On Thu, Dec 06, 2018 at 02:47:05PM +0100, Hans de Goede wrote:
> Add support for PMIC mipi sequences using the new
> intel_soc_pmic_exec_mipi_pmic_seq_element function.
Please document somewhere which machines you've found to need
this (commit msg should be sufficient I suppose). Can make it
much
From: Sean Paul
The irq_control function is called upon encoder enable/disable and turns
on/off the vblank interrupts. Unfortunately, it enables them when the
drm code is not expecting them to be on. As a result, we can get into
nasty locking situations.
vblank interrupts should be solely manage
Try to get the interconnect path for the GPU and vote for the maximum
bandwidth to support all frequencies. This is needed for performance.
Later we will want to scale the bandwidth based on the frequency to
also optimize for power but that will require some device tree
infrastructure that does not
https://bugs.freedesktop.org/show_bug.cgi?id=106175
--- Comment #76 from Brandon Wright ---
https://patchwork.freedesktop.org/series/53589/
A new patch has been submitted. So it's in the pipeline for inclusion now.
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https://bugs.freedesktop.org/show_bug.cgi?id=108514
--- Comment #12 from Werner Lueckel ---
thank you for your tip, but radeon.new_pll=0 gives me
... radeon: unknown parameter 'new_pll' ignored
And: I cannot find 'new_pll' in 'modinfo -p radeon';
So new_pll seems to be (no longer?) a radeon param
https://bugs.freedesktop.org/show_bug.cgi?id=100200
Emil Velikov changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
v2: adapt to new transfer ioctl
Signed-off-by: Chunming Zhou
---
include/drm-uapi/drm.h | 33 ++
lib/igt_syncobj.c| 206
lib/igt_syncobj.h| 19 +
tests/meson.build|1 +
tests/syncobj_timeline.c | 1051 ++
5 files cha
v2: drop DRM_SYNCOBJ_CREATE_TYPE_TIMELINE, fix timeout calculation,
fix some warnings
v3: add export/import and cpu signal testing cases
Signed-off-by: Chunming Zhou
Signed-off-by: Christian König
---
tests/amdgpu/Makefile.am | 3 +-
tests/amdgpu/amdgpu_test.c | 12 ++
tests/amdgpu
v2: adapt to new one transfer ioctl
Signed-off-by: Chunming Zhou
---
amdgpu/amdgpu-symbol-check | 3 ++
amdgpu/amdgpu.h| 51 +++
amdgpu/amdgpu_cs.c | 62 ++
3 files changed, 116 insertions(+)
diff --git a/amdgp
v2: use one transfer ioctl
Signed-off-by: Chunming Zhou
---
xf86drm.c | 33 +
xf86drm.h | 6 ++
2 files changed, 39 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 9816b3b2..2a089616 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4278,6 +4278,21 @@ drm_pu
v2: drop not implemented IOCTLs and flags
v3: add transfer/signal ioctls
Signed-off-by: Chunming Zhou
Signed-off-by: Christian König
---
include/drm/drm.h | 35 +++
1 file changed, 35 insertions(+)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 85c685a
Signed-off-by: Chunming Zhou
---
include/drm/amdgpu_drm.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index 1ceec56d..a3c067dd 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -517,6 +517,8 @@ struct drm_a
v2: drop export/import
Signed-off-by: Chunming Zhou
---
xf86drm.c | 44
xf86drm.h | 6 ++
2 files changed, 50 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 71ad54ba..9816b3b2 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4277,3 +4277,47 @@
v2: symbos are stored in lexical order.
v3: drop export/import and extra query indirection
Signed-off-by: Chunming Zhou
Signed-off-by: Christian König
---
amdgpu/amdgpu-symbol-check | 2 ++
amdgpu/amdgpu.h| 39 ++
amdgpu/amdgpu_cs.c | 23
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 8de55f7f1a3a..cafafdb1d03f 100644
--- a/drivers/gpu/drm/amd/amdgp
we need to import/export timeline point.
v2: unify to one transfer ioctl
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_internal.h | 2 +
drivers/gpu/drm/drm_ioctl.c| 2 +
drivers/gpu/drm/drm_syncobj.c | 79 ++
include/uapi/drm/drm.h | 10 +++
syncobj wait/signal operation is appending in command submission.
v2: separate to two kinds in/out_deps functions
Signed-off-by: Chunming Zhou
Cc: Daniel Rakos
Cc: Jason Ekstrand
Cc: Bas Nieuwenhuizen
Cc: Dave Airlie
Cc: Christian König
Cc: Chris Wilson
---
drivers/gpu/drm/amd/amdgpu/amdgp
v2: individually allocate chain array, since chain node is free independently.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_internal.h | 2 +
drivers/gpu/drm/drm_ioctl.c| 2 +
drivers/gpu/drm/drm_syncobj.c | 81 ++
include/uapi/drm/drm.h |
From: Christian König
Implement finding the right timeline point in drm_syncobj_find_fence.
v2: return -EINVAL when the point is not submitted yet.
v3: fix reference counting bug, add flags handling as well
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 43
points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
v4:
rebase
v5:
add comment for xxx_WAIT_AVAI
user mode can query timeline payload.
v2: check return value of copy_to_user
v3: handle querying entry by entry
v4: rebase on new chain container, simplify interface
Signed-off-by: Chunming Zhou
Cc: Daniel Rakos
Cc: Jason Ekstrand
Cc: Bas Nieuwenhuizen
Cc: Dave Airlie
Cc: Christian König
Cc:
From: Christian König
This completes "drm/syncobj: Drop add/remove_callback from driver
interface" and cleans up the implementation a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 91 ---
include/drm/drm_syncobj.h | 21
2 f
From: Christian König
Use the dma_fence_chain object to create a timeline of fence objects
instead of just replacing the existing fence.
v2: rebase and cleanup
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 37 +++
include/drm/drm_syncobj.h
From: Christian König
Lockless container implementation similar to a dma_fence_array, but with
only two elements per node and automatic garbage collection.
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev reference during garbage collection if it's no
On 06/12/2018 18:39, Souptick Joarder wrote:
Previouly drivers have their own way of mapping range of
kernel pages/memory into user vma and this was done by
invoking vm_insert_page() within a loop.
As this pattern is common across different drivers, it can
be generalized by creating a new functi
On Thu, Dec 06, 2018 at 08:30:27PM -0700, Jason Gunthorpe wrote:
> On Wed, Dec 05, 2018 at 12:36:26AM -0500, jgli...@redhat.com wrote:
> > From: Jérôme Glisse
> >
> > To avoid having to change many callback definition everytime we want
> > to add a parameter use a structure to group all parameter
Am 07.12.18 um 16:22 schrieb Grodzovsky, Andrey:
>
> On 12/07/2018 03:19 AM, Christian König wrote:
>> Am 07.12.18 um 04:18 schrieb Zhou, David(ChunMing):
-Original Message-
From: dri-devel On Behalf Of
Andrey Grodzovsky
Sent: Friday, December 07, 2018 1:41 AM
To:
On 12/07/2018 03:19 AM, Christian König wrote:
> Am 07.12.18 um 04:18 schrieb Zhou, David(ChunMing):
>>
>>> -Original Message-
>>> From: dri-devel On Behalf Of
>>> Andrey Grodzovsky
>>> Sent: Friday, December 07, 2018 1:41 AM
>>> To: dri-devel@lists.freedesktop.org; amd-...@lists.freedes
https://bugs.freedesktop.org/show_bug.cgi?id=107978
--- Comment #27 from Jerry Zuo ---
The dce110_stream_encoder_dp_blank timeout is something I am working on. It
doesn't break anything, but pretty annoying.
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On 06/12/2018 18:42, Souptick Joarder wrote:
Convert to use vm_insert_range() to map range of kernel
memory to user vma.
Signed-off-by: Souptick Joarder
Tested-by: Heiko Stuebner
Acked-by: Heiko Stuebner
---
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 20 ++--
1 file chan
Em Fri, 7 Dec 2018 00:09:45 +0530
Souptick Joarder escreveu:
> Previouly drivers have their own way of mapping range of
> kernel pages/memory into user vma and this was done by
> invoking vm_insert_page() within a loop.
>
> As this pattern is common across different drivers, it can
> be generali
On Fri, Dec 07, 2018 at 12:16:11PM +0530, C, Ramalingam wrote:
>
> On 12/6/2018 6:57 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:07PM +0530, Ramalingam C wrote:
> > > Implements the link integrity check once in 500mSec.
> > >
> > > Once encryption is enabled, an ongoing Link Integr
On Fri, Dec 07, 2018 at 11:52:21AM +0530, C, Ramalingam wrote:
>
> On 12/6/2018 4:00 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:04PM +0530, Ramalingam C wrote:
> > > Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
> > > supports HDCP2.2 and HDCP1.4, HDCP2.2 will
On Fri, Dec 07, 2018 at 04:18:25PM +0530, C, Ramalingam wrote:
>
> On 12/7/2018 11:22 AM, C, Ramalingam wrote:
> >
> >
> > On 12/6/2018 3:53 PM, Daniel Vetter wrote:
> > > On Tue, Nov 27, 2018 at 04:13:03PM +0530, Ramalingam C wrote:
> > > > Defining the mei-i915 interface functions and initiali
On Thu, Dec 6, 2018 at 8:38 PM Christoph Hellwig wrote:
>
> On Fri, Nov 30, 2018 at 10:46:04AM +0100, Daniel Vetter wrote:
> > > Being able to dip into CMA and maybe iommu coalescing if we want to
> > > get fancy is indeed the only reason for this API. If we just wanted
> > > to map pages we coul
On Fri, Dec 07, 2018 at 11:22:44AM +0530, C, Ramalingam wrote:
>
> On 12/6/2018 3:53 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:03PM +0530, Ramalingam C wrote:
> > > Defining the mei-i915 interface functions and initialization of
> > > the interface.
> > >
> > > Signed-off-by: Ram
Am 07.12.18 um 15:20 schrieb Daniel Vetter:
On Wed, Dec 05, 2018 at 11:00:33AM +0100, Christian König wrote:
Hi Daniel,
can I get a review for this one? It is essentially just a follow up cleanup
on one of your patches and shouldn't have any functional effect.
Unfortunately badly backlogged an
On Wed, Dec 05, 2018 at 11:00:33AM +0100, Christian König wrote:
> Hi Daniel,
>
> can I get a review for this one? It is essentially just a follow up cleanup
> on one of your patches and shouldn't have any functional effect.
Unfortunately badly backlogged an a handful of massive context switches
On Fri, Dec 07, 2018 at 10:24:26AM +0530, C, Ramalingam wrote:
>
> On 12/6/2018 3:33 PM, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 04:13:02PM +0530, Ramalingam C wrote:
> > > Add the HDCP2.2 initialization to the existing HDCP1.4 stack.
> > With the comments below addressed the commit messa
On Fri, Dec 07, 2018 at 07:23:06PM +0530, C, Ramalingam wrote:
> Hi,
>
> In one of the offline discussion Tomas has shared his review comments on v8.
Let's please have all review here on the mailing list for better
coordination. Playing a game of telephone isn't efficient.
> So I am sharing the
Now that we have everything we need in the phy framework to allow to tune
the phy parameters, let's convert the Cadence DSI bridge to that API
instead of creating a ad-hoc driver for its phy.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/bridge/cdns-dsi.c | 485 +++
MIPI D-PHY is a MIPI standard meant mostly for display and cameras in
embedded systems. Add a mode for it.
Reviewed-by: Laurent Pinchart
Reviewed-by: Sakari Ailus
Signed-off-by: Maxime Ripard
---
include/linux/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/phy/phy.
Now that our MIPI D-PHY driver has been converted to the phy framework,
let's move it into the drivers/phy directory.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Kconfig| 10 +-
drivers/gpu/drm/sun4i/Makefile | 1 -
drivers/phy/al
Now that we have some infrastructure for it, allow the MIPI D-PHY phy's to
be configured through the generic functions through a custom structure
added to the generic union.
The parameters added here are the ones defined in the MIPI D-PHY spec, plus
the number of lanes in use. The current set of p
Now that we have everything in place in the PHY framework to deal in a
generic way with MIPI D-PHY phys, let's convert our PHY driver and its
associated DSI driver to that new API.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Kconfig | 11 +-
drivers/gpu/drm/sun4i/Makefile
The phy framework is only allowing to configure the power state of the PHY
using the init and power_on hooks, and their power_off and exit
counterparts.
While it works for most, simple, PHYs supported so far, some more advanced
PHYs need some configuration depending on runtime parameters. These PH
The current configuration of the DSI bridge and its associated D-PHY is
intertwined. In order to ease the future conversion to the phy framework
for the D-PHY part, let's split the configuration in two.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/bridge/cdns-dsi.c | 96 +
The Cadence D-PHY bindings was defined as part of the DSI block so far.
However, since it's now going to be a separate driver, we need to move the
binding to a file of its own.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt | 21 +---
Documenta
Cadence has designed a D-PHY that can be used by the, currently in tree,
DSI bridge (DRM), CSI Transceiver and CSI Receiver (v4l2) drivers.
Only the DSI driver has an ad-hoc driver for that phy at the moment, while
the v4l2 drivers are completely missing any phy support. In order to make
that phy
The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.
Signed-off-by: Maxime Ripard
---
drivers/phy/Kcon
Hi,
Here is a set of patches to allow the phy framework consumers to test and
apply runtime configurations.
This is needed to support more phy classes that require tuning based on
parameters depending on the current use case of the device, in addition to
the power state management already provide
Hi,
In one of the offline discussion Tomas has shared his review comments on v8.
So I am sharing the abstract of his suggestions here for the discussion and for
the agreement of interface in the community.
Tomas please correct/add if I am missing any points.
1. Remove the include/linux/mei_hdcp
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