[Bug 106671] Frequent lock ups for AMD RX 550 graphics card

https://bugs.freedesktop.org/show_bug.cgi?id=106671 --- Comment #12 from Alan W. Irwin --- (In reply to Michel Dänzer from comment #10) > [T]hat looks like an RCU or other core kernel issue, not directly > related to the graphics drivers. Hi Michel: If so, should I report that probable non-graph

[Bug 200695] Blank screen on RX 580 with amdgpu.dc=1 enabled (no displays detected)

https://bugzilla.kernel.org/show_bug.cgi?id=200695 Claude Heiland-Allen (cla...@mathr.co.uk) changed: What|Removed |Added Kernel Version|4.18.0-rc7 |4.18.0-rc7, 4.

[PATCH 3/3] drm: add timeline syncobj payload query ioctl

user mode can query timeline payload. Signed-off-by: Chunming Zhou --- drivers/gpu/drm/drm_internal.h | 2 ++ drivers/gpu/drm/drm_ioctl.c| 2 ++ drivers/gpu/drm/drm_syncobj.c | 53 ++ include/uapi/drm/drm.h | 3 ++ 4 files changed, 60 insertions(+)

[PATCH 2/3] drm: add support of syncobj timeline point wait

points array is one-to-one match with syncobjs array. Signed-off-by: Chunming Zhou --- drivers/gpu/drm/drm_syncobj.c | 23 --- include/uapi/drm/drm.h| 2 ++ 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/dr

[PATCH 1/3] [RFC]drm: add syncobj timeline support v4

VK_KHR_timeline_semaphore: This extension introduces a new type of semaphore that has an integer payload identifying a point in a timeline. Such timeline semaphores support the following operations: * CPU query - A host operation that allows querying the payload of the timeline semaphore.

Re: [PATCH v2 13/13] drm/mediatek: config component output by device node port

Hi, Bibby: On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > We can select output component by decive node port. > Main path default output component is DSI. > External path default output component is DPI. > > Signed-off-by: Bibby Hsieh > --- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 37

Re: drm | Pipeline #4114 has failed for master | c55f1b9b

On Thu, Sep 6, 2018 at 4:00 AM, Rodrigo Vivi wrote: > well it builds for me. > > but any idea what might be wrong here on gitlab ci? > So ninja test works for you with your changes locally? Aside: Fork the drm repo into your own private space, push there before pushing to drm, and you can ma

Re: [PATCH v2 11/13] drm/mediatek: implement connection from BLS to DPI0

Hi, Bibby: On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > Modify display driver to support connection from BLS to DPI. > > Signed-off-by: Bibby Hsieh Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 19 ++- > 1 file changed, 18 insertions(+), 1 del

Re: [PATCH v2 08/13] drm/mediatek: register hdmi codec more earlier

Hi, Bibby: On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > From: chunhui dai > > sometimes hdmi reprobe due to encoder probe late, > but audio dai probe earlier than hdmi. it would make > audio dai cannot find the hdmi codec. we need to > register hdmi codec earlier, and the base name wh

[Bug 107561] [amdgpu] / rx550 / half the fps after thaw

https://bugs.freedesktop.org/show_bug.cgi?id=107561 arne_woer...@yahoo.com changed: What|Removed |Added Priority|medium |high -- You are receiving this

[Bug 105251] [Vega10] GPU lockup on boot: VMC page fault

https://bugs.freedesktop.org/show_bug.cgi?id=105251 --- Comment #50 from CheatCodesOfLife --- (In reply to Andrey Grodzovsky from comment #49) > (In reply to CheatCodesOfLife from comment #48) > > Created attachment 141425 [details] > > logs and trace > > > > Hi, > > > > I have applied the patc

Re: [PATCH v2 09/13] drm/mediatek: add support for SPDIF audio in HDMI

Hi, Bibby: On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > From: chunhui dai > > add support for SPDIF audio in HDMI > > Signed-off-by: chunhui dai Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_hdmi.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/drivers

Re: [linux-next] DDC responded, but no EDID for %s errors

On Thu, Sep 6, 2018 at 12:42 PM Sergey Senozhatsky wrote: > > On (08/02/18 11:46), Sergey Senozhatsky wrote: > > Hi, > > > > My dmesg is filled up with these errors > > > > nouveau :01:00.0: DRM: DDC responded, but no EDID for HDMI-A-1 > > nouveau :01:00.0: DRM: DDC responded, but no EDI

[Bug 107581] Graphics Not Rendered Due to Missing 4.5 COMPAT Profile

https://bugs.freedesktop.org/show_bug.cgi?id=107581 Timothy Arceri changed: What|Removed |Added CC||jonathanil...@gmail.com --- Comment #2

Re: [PATCH v2 06/13] drm/mediatek: add dpi driver for mt2701 and mt7623

Hi, Bibby: One inline comment. On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > From: chunhui dai > > This patch adds dpi dirver suppot for both mt2701 and mt7623. > And also support other (existing or future) chips that use > the same binding and driver. > > Signed-off-by: chunhui dai

Re: [PATCH v2 04/13] drm/mediatek: add clock factor for different IC

Hi, Bibby: One inline comment. On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > From: chunhui dai > > different IC has different clock designed in HDMI, the factor for > calculate clock should be different. Usinng the data in of_node > to find this factor. > > Signed-off-by: chunhui dai

[PATCH v5 15/19] drm/msm/dpu: remove LOCK/CLEAR support in RM

DPU had the support to LOCK the hw resources in atomic check and CLEAR the locked resources explicitly through custom property values. Now that DPU is stripped off of all the custom properties, the RM handlers for this feature will be no-op's. This change gets rid of all its references. changes in

[PATCH v5 10/19] drm/msm/dpu: make crtc get_mixer_width helper static

Mark CRTC get_mixer_width helper API static as it is not used outside the file. changes in v4: - Patch introduced in the series changes in v5: - Simplify the inline function (Sean) Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 +--- d

[PATCH v5 17/19] drm/msm/dpu: remove RM dependency on connector state

Connector states were passed around RM to update the custom topology connector property with chosen topology data. Now that we got rid of both custom properties and topology names, this change cleans up the mechanism to pass connector states across RM helpers and encoder functions. changes in v5:

[PATCH v5 14/19] drm/msm/dpu: remove cdm block support from resource manager

Support for CDM block is not present in DPU. Remove CDM handlers from resource manager. changes in v4: - Introduced in the series changes in v5: - Remove catalog references to CDM (Sean) Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/Makefile | 1

[PATCH v5 18/19] drm/msm/dpu: relax parameter validation in encoders

DPU, being over protective, validates every parameter of a module. This change traces the call stack for some of encoder functions affected by previous set of clean up patches and cleans up unwanted validations. changes in v5: - Introduced in the series Signed-off-by: Jeykumar Sankaran -

[PATCH v5 19/19] drm/msm/dpu: remove RM topology definition

RM maintained a redundant definition for display topology to identify the no. of hw blocks needed for a display and their hardware dependencies. This information can be implicitly deduced from the msm_display_topology structure available in RM reserve request. In addition to getting rid of the redu

[PATCH v5 16/19] drm/msm/dpu: remove display H_TILE from encoder

Encoder H_TILE values are not used for allocating the hw blocks. no. of hw_intf blocks provides the info. changes in v4: - remove irrelevant changes (Sean) - retain log macros (Sean) changes in v5: - none Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drive

[PATCH v5 11/19] drm/msm/dpu: move hw resource tracking to crtc state

Prep changes for state based resource management. Moves all the hw block tracking for the crtc to the state object. changes in v4: - Serialize crtc state access in debugfs handlers (Sean) - Split the crtc width query as a separate change (Sean) changes in v5: - mode set lo

[PATCH v5 08/19] drm/msm/dpu: iterate for assigned hw ctl in virtual encoder

In virtual encoder modeset, DPU makes RM request to assign hw blocks for the display. It is also expected in modeset to iterate and associate the physical encoders with their relevant hw blocks. Ping pong blocks are already handled here but hw ctl blocks are not. This change moves the hw_ctl iterat

[PATCH v5 13/19] drm/msm/dpu: clean up destination scaler residue

Destination scaling(DS) is a Snapdragon hardware feature to scale up the display ROI after layer blending. DPU driver doesn't support programming of DS blocks yet. This change cleans up the residual code present in catalog and RM for DS block handling. Support for the same can be added back when th

[PATCH v5 09/19] drm/msm/dpu: avoid querying for hw intf before assignment

Resource manager assigns hw_intf blocks for the encoder only on modeset. If queried for hw_intf objects during init, it will be NULL. Since hw_intf objects are needed only after encoder enable, defer the query to encoder enable which will be triggered after modeset. changes in v4: - Add de

[PATCH v5 12/19] drm/msm/dpu: rename hw_ctl to lm_ctl

Rename hw_ctl to lm_ctl to mean the ctl associated with the hw layer mixer block. sed -i 's/\([*@.>]\)hw_ctl\([^s]\)/\1lm_ctl\2/g' dpu_crtc.c dpu_crtc.h changes in v4: - Specifiy shell command used for renaming (Sean) changes in v5: - none Signed-off-by: Jeykumar Sankaran Review

[PATCH v5 07/19] drm/msm/dpu: use kms stored hw mdp block

Avoid querying RM for hw mdp block. Use the one stored in KMS during initialization. changes in v4: - none changes in v5: - none Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 12 +--- drivers/gpu/drm/m

[PATCH v5 01/19] drm/msm/dpu: remove debugfs support for misr

MISR support is the debug feature present in Snapdragon chipsets. At the layer mixer and interfaces, MISR algorithm can generate CRC signatures of the pixel data which can be used for validating the frames generated. Since there are no clients for this feature, strip down the support from the drive

[PATCH v5 02/19] drm/msm/dpu: squash power handle event types

DPU power handler maintained PRE/POST versions of power ENABLE/DISABLE events to accommodate tasks which need be handled before/after data bus voting. But since the bus voting API's are deprecated and removed from the driver, squash the events and their clients respective event handlers to handle o

[PATCH v5 06/19] drm/msm/dpu: enable master-slave encoders explicitly

Identify slave-master encoders during initialization and enable the encoders explicitly as the current logic has redundant and ambiguous loops. changes in v4: - identify master/slave encoder while adding adding physical encoders(Sean) changes in v5: - get rid of temporary

[PATCH v5 05/19] drm/msm/dpu: remove ping pong split topology variables

removes left out variables of previous ping pong split topology cleanup. changes in v4: - none changes in v5: - none Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/driver

[PATCH v5 04/19] drm/msm/dpu: remove resource pool manager

resource pool manager utility was introduced to manage rotator sessions. Removing the support as the rotator feature doesn't exist. changes in v4: - none changes in v5: - none Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c |

[PATCH v5 00/19] clean up DPU for RM refactor

Based on the comments received for the patch series[1] and to make the review process a bit more easy, spliting up the patches for cleanup and resource manager refactor. This series cleans up and prepares the DPU for upcoming RM changes. [1] https://patchwork.freedesktop.org/series/44669/ Thank

[PATCH v5 03/19] drm/msm/dpu: remove scalar config definitions

cleans up left out scalar config definitions from headers changes in v4: - none changes in v5: - none Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 10 -- 2

Re: drm | Pipeline #4114 has failed for master | c55f1b9b

well it builds for me. but any idea what might be wrong here on gitlab ci? On Wed, Sep 5, 2018 at 4:20 PM GitLab wrote: > > [image: Fdo logo] > [image: ✖] Your pipeline has failed. > > Project Mesa / drm > > Bra

Re: [PATCH v2 05/13] drm/mediatek: dpi use new API for finding bridge

Hi, Bibby: On Wed, 2018-09-05 at 16:31 +0800, Bibby Hsieh wrote: > From: chunhui dai > > Using new API for finding bridge. > This patch looks good, but your description is so simple that we don't know why you want to do this. In [1], Rob wants to clean up OF graph API, so in [2], mtk_dsi.c use

[Bug 106671] Frequent lock ups for AMD RX 550 graphics card

https://bugs.freedesktop.org/show_bug.cgi?id=106671 --- Comment #11 from Alan W. Irwin --- Thanks for that idle=nomwait suggestion which I have now just tried (verified by irwin@merlin> cat /proc/cmdline BOOT_IMAGE=/boot/vmlinuz-4.17.0-3-amd64 root=UUID=1e45a1ee-a5d6-4327-9a7b-2663ffc0b157 ro ro

[PATCH weston 2/3] compositor-drm: Add support for drm plane FB_DAMAGE_CLIPS property

The plane property FB_DAMAGE_CLIPS provides a way mark damaged regions on the plane in framebuffer coordinates of the framebuffer attached to the plane. This patch adds a new member "damage" to compositor version of drm_plane_state and set FB_DAMAGE_CLIPS property whenever damage is available. Si

[PATCH i-g-t 5/5] tests/kms_atomic: Add a new test case for FB_DAMAGE_CLIPS plane property

Some simple test cases to use FB_DAMAGE_CLIPS plane property. Signed-off-by: Deepak Rawat Cc: dri-devel@lists.freedesktop.org Cc: Daniel Vetter Cc: Lukasz Spintzyk Cc: Rob Clark Cc: Daniel Stone Cc: Noralf Trønnes Cc: Dave Airlie --- lib/igt_kms.c | 1 + lib/igt_kms.h |

[Bug 107693] [wine] Wolfenstein: The Old Blood - can't find GL_EXT_framebuffer_object

https://bugs.freedesktop.org/show_bug.cgi?id=107693 --- Comment #5 from Timothy Arceri --- (In reply to Sven Arvidsson from comment #4) > Looks like the Nvidia driver exposes GL_EXT_framebuffer_object in core > profiles. > > The ARB and EXT variants supposedly differ somewhat so I guess it's don

[PATCH libdrm] xf86drm: Add signed32 rectangle

With drm subsystem using struct drm_rect to manage rectangular area this export it to user-space. Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS. Signed-off-by: Deepak Rawat --- include/drm/drm_mode.h | 19 +++ xf86drmMode.h | 2 ++ 2 files changed, 21

[PATCH 07/14] drm/vmwgfx: implement STDU plane update for BO backed fb

Using the new interface implement STDU plane update for BO backed fb. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 14 ++ drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 235 +++ 2 files changed, 249 insertions(+) diff --git a/drivers/gpu/drm/vmwgfx/vmw

[PATCH 03/14] drm: clear plane damage during full modeset

Plane damage is irrelevant when full modeset happens so clear the damage blob property(If set by user-space). With damage blob cleared damage helper iterator will return full plane src as damage clip. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/drm_atomic_helper.c | 4 include/drm/drm_

[PATCH 13/14] drm/vmwgfx: enable FB_DAMAGE_CLIPS property for SOU primary plane

SOU primary plane now support damage clips, enable it for user-space. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c index 290d550d1b77..c49666

[PATCH 00/14] plane update with damage

Hi, Set of patches for a new plane property FB_DAMAGE_CLIPS to send damage during plane update. I have incorporated review comments since last RFC. Also with this patch series vmwgfx implementation of plane damage. Based on Rob Clark earlier patch, implemented legacy dirtyfb with new damage clips

[PATCH 12/14] drm/vmwgfx: use the new interface for SOU plane update

With new interface to do plane update on SOU available, use that instead of old kms_dirty. Updated the comments to sync with code. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 38 +++- 1 file changed, 9 insertions(+), 29 deletions(-) diff --git

[PATCH 11/14] drm/vmwgfx: implement SOU plane update for BO backed fb

Using the new interface implement SOU plane update for BO backed fb. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 134 +++ 1 file changed, 134 insertions(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.

[PATCH 14/14] drm/vmwgfx: use atomic helper function for dirty fb IOCTL

With new atomic helper for dirty fb IOCTL is available which uses damage interface, use that for dirty fb IOCTL. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 116 +--- 1 file changed, 2 insertions(+), 114 deletions(-) diff --git a/drivers/gpu/drm

[PATCH 08/14] drm/vmwgfx: use the new interface for STDU plane update

With new interface to do plane update on STDU available, use that instead of old kms_dirty. Update the commet to sync with code. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 38 +++- 1 file changed, 9 insertions(+), 29 deletions(-) diff --git a/

[PATCH 10/14] drm/vmwgfx: implement SOU plane update for surface backed fb

Using the new interface implement SOU plane update for surface backed fb. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 3 + drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 187 +++ 2 files changed, 190 insertions(+) diff --git a/drivers/gpu/drm/vmwgfx/

[PATCH 09/14] drm/vmwgfx: enable FB_DAMAGE_CLIPS property for STDU primary plane

STDU primary plane now support damage clips, enable it for user-space. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c index 167190b75e2f..11a76aa

[PATCH 04/14] drm: add helper to implement legacy dirtyfb

From: Rob Clark Add an atomic helper to implement dirtyfb support. This is needed to support DSI command-mode panels with x11 userspace (ie. when we can't rely on pageflips to trigger a flush to the panel). v2: Modified the helper to use plane fb_damage_clips property and removed plane_state::d

[PATCH 05/14] drm/vmwgfx: add a new interface for plane update on a display unit

Add a new struct vmw_du_update_plane similar to vmw_kms_dirty which represent the flow of operations needed to update a display unit from surface or bo(blit a new framebuffer). Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 108 + drivers/gpu/drm/vmwgfx

[PATCH 06/14] drm/vmwgfx: implement STDU plane update for surface backed fb

Using the new interface implement STDU plane update for surface backed fb. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 11 ++ drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 209 ++- 2 files changed, 219 insertions(+), 1 deletion(-) diff --git a/driver

[PATCH 02/14] drm: add helper iterator functions for plane fb_damage_clips blob

With fb_damage_clips blob property in drm_plane_state, this patch adds helper iterator to traverse the damage clips that lie inside plane src. Iterator will return full plane src as damage in case need full plane update or damage is not specified. Signed-off-by: Deepak Rawat --- drivers/gpu/drm/

[PATCH 01/14] drm: add new plane property FB_DAMAGE_CLIPS to send damage during plane update

From: Lukasz Spintzyk FB_DAMAGE_CLIPS is an optional plane property to mark damaged regions on the plane in framebuffer coordinates of the framebuffer attached to the plane. The layout of blob data is simply an array of "struct drm_mode_rect" with maximum array size limited by DRM_MODE_FB_DIRTY_

Re: [Intel-gfx] [PATCH libdrm v3 0/5] intel: rework how we add PCI IDs

On Wed, Sep 05, 2018 at 08:56:44PM +0100, Chris Wilson wrote: > Quoting Lucas De Marchi (2018-09-05 19:31:55) > > Adding PCI IDs to different projects is a boring manual task that > > motivated me to create this series. The idea is to centralize the IDs in > > the kernel header and let other projec

Re: [Intel-gfx] [PATCH v5 2/2] drm/i915: Allow "max bpc" property to limit pipe_bpp

On Wed, Sep 05, 2018 at 01:12:00PM -0700, Radhakrishna Sripada wrote: > Use the newly added "max bpc" connector property to limit pipe bpp. > > V3: Use drm_connector_state to access the "max bpc" property > V4: Initialize the drm property, add suuport to DP(Ville) > V5: Use the property in the con

Re: [PATCH] drm: Print erroneous hscale/vscale on failure

On Wed, Sep 05, 2018 at 04:46:01PM -0400, Sean Paul wrote: > From: Sean Paul > > I ran across this last week when I was trying to get this function to > work. It's useful to have the scale values in the log upon failure. > > Signed-off-by: Sean Paul Reviewed-by: Daniel Vetter > --- > driver

[Bug 107784] [AMD tahiti XT] displayport broken

https://bugs.freedesktop.org/show_bug.cgi?id=107784 --- Comment #13 from Sylvain BERTRAND --- Created attachment 141465 --> https://bugs.freedesktop.org/attachment.cgi?id=141465&action=edit kernel log from a good commit -- You are receiving this mail because: You are the assignee for the bug.

[Bug 107784] [AMD tahiti XT] displayport broken

https://bugs.freedesktop.org/show_bug.cgi?id=107784 Sylvain BERTRAND changed: What|Removed |Added Attachment #141416|0 |1 is obsolete|

[Bug 107784] [AMD tahiti XT] displayport broken

https://bugs.freedesktop.org/show_bug.cgi?id=107784 --- Comment #11 from Sylvain BERTRAND --- bisected: e2a9ca29b5edc89da2fddeae30e1070b272395c5 This commit is one in a series related to new TSC code. I tried to switch the clocksource to hpet early in the boot process, did not change anything.

Re: [Bug 107784] [AMD tahiti XT] displayport broken

bisected: e2a9ca29b5edc89da2fddeae30e1070b272395c5 This commit is one in a series related to new TSC code. I tried to switch the clocksource to hpet early in the boot process, did not change anything. Any ideas before I post an issue on kernel bugzilla? __

[Bug 107045] [4.18rc2] RX470 dGPU on hybrid laptop freezes screen after use

https://bugs.freedesktop.org/show_bug.cgi?id=107045 --- Comment #24 from taij...@posteo.de --- OK, another update after another test, this time booting into a live system without any graphical shell/login manager. Here, manipulating /sys/class/intel_backlight/brightness does nothing to the dGPU,

Re: [PATCH 3/6] dt-bindings: display: add data-enable polarity property

Hi Stefan, On Wednesday, 5 September 2018 21:10:08 EEST Stefan Agner wrote: > On 05.09.2018 00:07, Laurent Pinchart wrote: > > On Wednesday, 5 September 2018 08:21:10 EEST Stefan Agner wrote: > >> Allow to specify the data-enable polarity required by a dumb VGA > >> DAC converting parallel RGB to

[PATCH] drm: Print erroneous hscale/vscale on failure

From: Sean Paul I ran across this last week when I was trying to get this function to work. It's useful to have the scale values in the log upon failure. Signed-off-by: Sean Paul --- drivers/gpu/drm/drm_atomic_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drive

[PULL] drm-misc-next

Hi Dave, Here's the latest from -misc-next. This PR includes last weeks as well, I've added both summaries below for your convenience. This week was quite busy, guess everyone is back to work now! This pull features a nice mix of new hw support and code cleanup, with the headliner being udmabuf.

[PATCH v5 1/2] drm: Add connector property to limit max bpc

At times 12bpc HDMI cannot be driven due to faulty cables, dongles level shifters etc. To workaround them we may need to drive the output at a lower bpc. Currently the user space does not have a way to limit the bpc. The default bpc to be programmed is decided by the driver and is run against conne

[PATCH v5 2/2] drm/i915: Allow "max bpc" property to limit pipe_bpp

Use the newly added "max bpc" connector property to limit pipe bpp. V3: Use drm_connector_state to access the "max bpc" property V4: Initialize the drm property, add suuport to DP(Ville) V5: Use the property in the connector and fix CI failure(Ville) Cc: Ville Syrjälä Cc: Rodrigo Vivi Cc: Kisho

Re: [PATCH libdrm v3 0/5] intel: rework how we add PCI IDs

Quoting Lucas De Marchi (2018-09-05 19:31:55) > Adding PCI IDs to different projects is a boring manual task that > motivated me to create this series. The idea is to centralize the IDs in > the kernel header and let other projects copy it. > > Initially my plan was to convert all gens, back to ge

Re: [PATCH] drm/rockchip: rgb: add stub functions when rgb encoder is disabled

On Wed, Sep 05, 2018 at 03:33:56PM -0400, Sean Paul wrote: > On Wed, Sep 05, 2018 at 09:13:02PM +0200, Heiko Stuebner wrote: > > The newly added internal rgb encoder for Rockchip vops is missing > > stubs for the case that the rgb output part is not enabled in the > > kernel config. So add these. >

Re: [PATCH 2/7] drm: Drop drmP.h from drm_connector.c

> > > 2) patch revision info belongs outside the changelog part - no? > > If it's information worth writing it's information worth recording. In > drm we're pretty much ok with whatever you feel like, and most people > include the patch revision in the commit message. Too many cases where > criti

[PATCH 21/21] fbdev: fsl-diu: get cpu node with of_get_cpu_node

"device_type" use is deprecated for FDT though it has continued to be used for nodes like cpu nodes. Use of_get_cpu_node() instead which works using node names by default. This will allow the eventually removal of cpu device_type properties. Cc: Timur Tabi Cc: Bartlomiej Zolnierkiewicz Cc: linux

[PATCH 00/21] DT cpu node iterator

This series adds an iterator for cpu nodes and converts users over to use it or of_get_cpu_node in some cases. This allows us to remove the dependency on device_type property for cpu nodes though removing that from DTS files will have to wait for some time. In some cases, this makes the DT search m

Re: [PATCH] drm/rockchip: rgb: add stub functions when rgb encoder is disabled

On Wed, Sep 05, 2018 at 09:13:02PM +0200, Heiko Stuebner wrote: > The newly added internal rgb encoder for Rockchip vops is missing > stubs for the case that the rgb output part is not enabled in the > kernel config. So add these. > > Fixes: 1f0f01515172 ("drm/rockchip: Add support for Rockchip So

[PATCH] drm/rockchip: rgb: add stub functions when rgb encoder is disabled

The newly added internal rgb encoder for Rockchip vops is missing stubs for the case that the rgb output part is not enabled in the kernel config. So add these. Fixes: 1f0f01515172 ("drm/rockchip: Add support for Rockchip Soc RGB output interface") Signed-off-by: Heiko Stuebner --- drivers/gpu/

[PATCH libdrm v3 4/5] intel: make gen9 use generic gen macro

The 2 PCI IDs that are used for the command line overrid mechanism were left defined. The rest can be gone and then we just use the kernel defines. Signed-off-by: Lucas De Marchi --- intel/intel_chipset.c | 5 ++ intel/intel_chipset.h | 187 +- 2 files c

[PATCH libdrm v3 3/5] intel: make gen10 use generic gen macro

Signed-off-by: Lucas De Marchi --- intel/intel_chipset.c | 1 + intel/intel_chipset.h | 34 +- 2 files changed, 2 insertions(+), 33 deletions(-) diff --git a/intel/intel_chipset.c b/intel/intel_chipset.c index a960b756..a627928e 100644 --- a/intel/intel_chipset.c

[PATCH libdrm v3 1/5] intel: add generic functions to check PCI ID

This will allow platforms to reuse kernel IDs instead of manually keeping them in sync. In most of the cases we only need to extend IS_9XX(). Current platforms that fit this requirement can be ported over to use this macro. Right now it's a nop since it doesn't have any PCI ID added. The i915_pci

[PATCH libdrm v3 5/5] intel: get gen once for gen >= 9

We don't need to call IS_GEN() for each gen >= 9: we can rather use the new intel_is_genx() helper to iterate the pciids array once. Signed-off-by: Lucas De Marchi --- intel/intel_bufmgr_gem.c | 8 +--- intel/intel_decode.c | 8 ++-- 2 files changed, 3 insertions(+), 13 deletions(-)

[PATCH libdrm v3 2/5] intel: make gen11 use generic gen macro

Signed-off-by: Lucas De Marchi --- intel/intel_chipset.c | 1 + intel/intel_chipset.h | 27 ++- 2 files changed, 3 insertions(+), 25 deletions(-) diff --git a/intel/intel_chipset.c b/intel/intel_chipset.c index 545819ae..a960b756 100644 --- a/intel/intel_chipset.c +++ b/

Re: [PATCH 1/6] drm/bridge: use bus flags in bridge timings

On 05.09.2018 00:44, Laurent Pinchart wrote: > Hi Stefan, > > On Wednesday, 5 September 2018 10:06:28 EEST Laurent Pinchart wrote: >> On Wednesday, 5 September 2018 08:21:08 EEST Stefan Agner wrote: >> > The DRM bus flags convey additional information on pixel data on >> > the bus. All current ava

[PATCH libdrm v3 0/5] intel: rework how we add PCI IDs

Adding PCI IDs to different projects is a boring manual task that motivated me to create this series. The idea is to centralize the IDs in the kernel header and let other projects copy it. Initially my plan was to convert all gens, back to gen2, but that proved slightly difficult since there are s

[PULL] drm-intel-fixes

Hi Dave, Here goes drm-intel-fixes-2018-09-05: The critical fix here on display side is the DP MST regression one. But this pull also include fixes for DP SST, small VDSC register fix and GVT's bucked with "BXT fixes, two guest warning fixes, dmabuf format mod fix and one for recent multiple VM t

Re: [PATCH v2 4/6] drm: fix drm_mode_addfb() on big endian machines.

On Wed, Sep 05, 2018 at 08:04:43AM +0200, Gerd Hoffmann wrote: > Userspace on big endian machhines typically expects the ADDFB ioctl > returns a big endian framebuffer. drm_mode_addfb() will call > drm_mode_addfb2() unconditionally with little endian DRM_FORMAT_* > values though, which is wrong.

[PATCH] drm/amdgpu: Remove default best_encoder hook from DC

For atomic driver this is the default, no need to reimplement it. We still need to keep the copypasta for not-atomic drivers though, since no one polished the legacy crtc helpers as much as the atomic ones. v2: amdgpu uses ->best_encoder internally, give it a local copy. It might be a good idea to

[PATCH] drm: Update todo.rst

- drmP.h is now fully split up. - vkms is happening (and will gain its own todo and docs under a new vkms.rst file real soon) - legacy cruft is completely hidden now, drm_vblank.c is split out from drm_irq.c now. I've decided to drop the task to split out drm_legacy.ko, partially because Dave

Re: [PATCH 3/6] dt-bindings: display: add data-enable polarity property

On 05.09.2018 00:07, Laurent Pinchart wrote: > Hi Stefan, > > Thank you for the patch. > > On Wednesday, 5 September 2018 08:21:10 EEST Stefan Agner wrote: >> Allow to specify the data-enable polarity required by a dumb VGA >> DAC converting parallel RGB to VGA. >> >> Signed-off-by: Stefan Agner

Re: [PATCH 1/6] drm/bridge: use bus flags in bridge timings

On 05.09.2018 11:00, Stefan Agner wrote: > The DRM bus flags convey additional information on pixel data on > the bus. All current available bus flags might be of interest for > a bridge. Remove the sampling_edge field and use bus_flags. > > In the case at hand a dumb VGA bridge needs a specific d

Re: [PATCH libdrm v2 5/5] intel: get gen once for gen >= 9

On Wed, Aug 29, 2018 at 03:31:11PM +0100, Chris Wilson wrote: > Quoting Lucas De Marchi (2018-08-29 01:35:32) > > We don't need to call IS_GEN() for each gen >= 9: we can rather use the > > new intel_is_genx() helper to iterate the pciids array once. > > > > Signed-off-by: Lucas De Marchi > > ---

[PATCH 2/6] drm/bridge: allow to specify data-enable polarity

Support boards with a passive RGB to VGA bridge which require a low active data-enable polarity. Signed-off-by: Stefan Agner --- Alternatively a new dt binding could be introduced for dumb VGA bridges requiring low active data enable... However, also other polarities might need a specific polarit

[PATCH 3/6] dt-bindings: display: add data-enable polarity property

Allow to specify the data-enable polarity required by a dumb VGA DAC converting parallel RGB to VGA. Signed-off-by: Stefan Agner --- .../devicetree/bindings/display/bridge/dumb-vga-dac.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/brid

[PATCH libdrm 1/2] modeprint: use libutil to lookup strings

Use libutil to lookup connector type names and state. This also makes sure that the latest connector type addition "DPI" gets printed correctly. Signed-off-by: Stefan Agner --- tests/modeprint/Makefile.am | 1 + tests/modeprint/meson.build | 2 +- tests/modeprint/modeprint.c | 43 ++---

[PATCH libdrm 2/2] modeprint: print encoder type

Print encoder types similar to connector types. Signed-off-by: Stefan Agner --- tests/modeprint/modeprint.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tests/modeprint/modeprint.c b/tests/modeprint/modeprint.c index 1d62270f..ad727e12 100644 --- a/tests/modeprint/m

[PATCH 1/6] drm/bridge: use bus flags in bridge timings

The DRM bus flags convey additional information on pixel data on the bus. All current available bus flags might be of interest for a bridge. Remove the sampling_edge field and use bus_flags. In the case at hand a dumb VGA bridge needs a specific data enable polarity (DRM_BUS_FLAG_DE_LOW). Signed-

Re: [RFC] UAPI: Check headers by compiling all together as C++

Greg KH wrote: > > Here's a set of patches that inserts a step into the build process to make > > sure that the UAPI headers can all be built together with C++ (if the > > compiler being used supports C++). All but the final patch perform fixups, > > including: > > Wait, why do we care? What h

[PATCH RESEND 1/2] drm/panel: seiko-43wvf1g: Switch to SPDX identifier

From: Fabio Estevam Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam --- drivers/gpu/drm/panel/panel-seiko-43wvf1g.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c

[PATCH RESEND 2/2] drm/panel: seiko-43wvf1g: Add missing ">" character in author's email

From: Fabio Estevam There is a missing ">" character in Marco's email. Fix it. Signed-off-by: Fabio Estevam --- drivers/gpu/drm/panel/panel-seiko-43wvf1g.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c b/drivers/gpu/drm/panel/

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