Hi @paddi,
Dependence queue itself is use to implement synchronization logic like
semaphore and not same as a software data queue, 2 dependency queue is because
here need to implement logic of "read after write" and "write after read" for
shared SRAM.
Regards
Hua
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Very appreciate @hjiang, that’s the key point. Your recommendation is my top
consideration to deep into study. Here is another issue to understand why there
is two dependence queues(fifo) between modules? In the perspective of software
multi threads coding, that require only one queue which is
Hi Paddi,
Good to know have interest with VTA and TLPP, about your question
load/compute/store are serialized, I think you may means the logic in
unit test function VTA(), the VTA(...) actually is not get involved when
FPGA do real compute and such function only work when do unit test,
For t
hi
I am new learner to TVM and VTA. What confuse me is how parallelism run? I may
get the idea of it with virtual and block diagram in VTA paper, but the code in
vta-hw/src confuse me, as in that code, module load, compute and store are
serialized. What is my problem? I will appreciate if any
