Very appreciate @hjiang, that’s the key point. Your recommendation is my top
consideration to deep into study. Here is another issue to understand why there
is two dependence queues(fifo) between modules? In the perspective of software
multi threads coding, that require only one queue which is
hi
I am new learner to TVM and VTA. What confuse me is how parallelism run? I may
get the idea of it with virtual and block diagram in VTA paper, but the code in
vta-hw/src confuse me, as in that code, module load, compute and store are
serialized. What is my problem? I will appreciate if any
