Hey @Hagoon, thanks for your message. There are some issues in the vivado TCL
script when migrating to 2020.1. My colleague @vegaluis has looked into this,
and hopefully it should be a matter of days until we can upgrade all of the
scripts to rely on the latest version of Vivado. Thanks!
This thread proposes some changes: there is an upcoming PR in the works:
https://discuss.tvm.ai/t/rfc-vta-support-for-cloud-devices-opencl-compatible/6676/22
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You are receiving this becaus
Also for reproducibility sake, can you give a pointer to the conv2d workload
you ran on the pynq? It might be worth looking into what's happening inside of
the Chisel-based VTA design so we can improve it. Adding @vegaluis to the
thread.
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@joyliu37 thanks for looking into this. There is at the moment two VTA design
sources: the initial design (which was used in the TVM and VTA papers) that was
generated with HLS - this is the design that one can test and deploy on the
Pynq/Ultra96 boards and run workloads like Resnet-18. We've
Hmmm that might be an issue with the IR pass that tries to pattern match 2D DMA
access in this file
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