I think "native C-code generation" is used for more niche use cases like
micro-TVM / embedded, but yes, we don't typically emit native C code for
convolution kernels etc.
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You are r
[quote="Nullko, post:1, topic:11778"]
My accelerator runtime’s Gather-Scatter ops require `i32` indices tensors,
however, by default Relay uses `i64` indices, is there a simple way to set all
indices tensors in a Relay graph to `i32` dtype?
[/quote]
I don't see an easy way for this, may be you
This is coming from PyTorch, not TVM.
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For now, we only support inference. But the community is definitely interested
in training support and some people are already working on it. There are some
related talks during the TVMcon (recordings will be uploaded next year soon).
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Hi community, recently I have been studying TVM's auto-scheduler, both
[Ansor](https://www.usenix.org/system/files/osdi20-zheng.pdf) for TE and
[AutoTIR](https://github.com/apache/tvm-rfcs/blob/main/rfcs/0005-meta-schedule-autotensorir.md)
for TensorIR. I read the Ansor paper and basically und
