Hello, We are also working on this. Perhaps we can discuss and learn this
progress together?
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Now I understand. Thank you.
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Hello all:
First of all, please forgive me for my poor English.
We try to test VTA on ZCU102, a problem was found.
When HPC on PL reads or writes data, the hardware cache coherency can not work.
Modify function VTAMemAlloc:
void * VTAMemAlloc(size_t size, int cached) {
..
