Also for reproducibility sake, can you give a pointer to the conv2d workload
you ran on the pynq? It might be worth looking into what's happening inside of
the Chisel-based VTA design so we can improve it. Adding @vegaluis to the
thread.
---
[Visit
Topic](http://tracking.discuss.tvm.ai/t
@joyliu37 thanks for looking into this. There is at the moment two VTA design
sources: the initial design (which was used in the TVM and VTA papers) that was
generated with HLS - this is the design that one can test and deploy on the
Pynq/Ultra96 boards and run workloads like Resnet-18. We've
Same as here @flip1995
---
[Visit
Topic](http://tracking.discuss.tvm.ai/tracking/click?d=nHxoFz2fy8VPt65OSNLdA3H2QbbDwnPlW6dXsal2FpullvCHDlkO3ivgecPc15ytN0OE2LV3z9vIgZp_WjIPN6hI0Ootgfxtp77Bz4QBiFokECwVViCuqp3QC5s-UqIXyCXblXsx2jFo8AKMP2-mBpUNOSHX61bcK9XtExZGgiBVMmAsaQ9aX1IXRuSZCTtAxNYNY6RoH7
