Hello
I am interested in development of the stm32f4 bsp.
We have small project based on the STM32F429 MCPU which we would like to
run RTEMS on.
>From the current code one could say there is not much. Only UART in
polling, started I2C, some defines and few registers descriptions,
interrupts just t
ect
> implementing a USB device. If you are interested I could send you the code.
> It hasn't been touched for a while, it may or may not have bit rot.
>
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>
> On 18 September 2014 12:12:21 Tomasz Gregorek
> wrote:
x27;t get a chance tonight it will probably be in a week or so.
>
> Regards,
> Chris.
>
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>
> On 19 September 2014 00:43:59 Tomasz Gregorek
> wrote:
>
>> Hi Chris
>>
>> Yes, I am very interested.
send the STM32 project to you soon, I will be travelling for the
> next
> > week so if I don't get a chance tonight it will probably be in a week or
> so.
> >
> > Regards,
> > Chris.
> >
> > Sent with AquaMail for Android
> > http://www.aqua-mail.com
From: Tomasz Gregorek
Added simple math to caclulate register values for the PLL
and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
Also it will slow down Flash memory for the high speeds.
---
c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h | 10 +
.../libbsp/arm/stm32f4
sorry, ignore this one.
2014-09-20 20:15 GMT+02:00 :
> From: Tomasz Gregorek
>
> Added simple math to caclulate register values for the PLL
> and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
> Also it will slow down Flash memory for the high speeds.
>
From: Tomasz Gregorek
Added simple math to caclulate register values for the PLL
and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
Also it will slow down Flash memory for the high speeds.
---
c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h | 10 +
.../libbsp/arm/stm32f4
quot; <
> tomasz.grego...@gmail.com> wrote:
> >From: Tomasz Gregorek
> >
> >Added simple math to caclulate register values for the PLL
> >and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
> >Also it will slow down Flash memory for the high spee
From: Tomasz Gregorek
Added simple math to caclulate register values for the PLL
and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
Also it will set latency on the Flash memory for the high speeds.
Limitations:
It is assumed that 1MHz resolution is enough.
Best fits for the
2014-09-21 20:07 GMT+02:00 :
> From: Tomasz Gregorek
>
> Added simple math to caclulate register values for the PLL
> and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
> Also it will set latency on the Flash memory for the high speeds.
>
> Limitations:
Hi Chris
- pll_q = ( (long) ( src_clk * pll_n + src_clk * pll_n / 2 ) ) / pll_m /
48; + pll_q = ( (long) ( src_clk * pll_n ) ) / pll_m / 48;
Your fix for the PLL_Q calculation is correct.
It supposed to be rounding from <=X.5 to X and from >X.5 to (X+1) but first
I messed up the equation second t
Hi Chris
2014-10-19 8:36 GMT+02:00 Chris Nott :
> Hi,
>
> On 18/10/2014 3:45 AM, Tomasz Gregorek wrote:
>
> Hi Chris
>
> - pll_q = ( (long) ( src_clk * pll_n + src_clk * pll_n / 2 ) ) / pll_m /
> 48; + pll_q = ( (long) ( src_clk * pll_n ) ) / pll_m / 48;
>
> Your
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