On 22.03.24 16:48, Kinsey Moore wrote:
This patch looks good. I would suggest dropping the a53 from the BSP
name since all AArch64 ZynqMP BSPs will run on the A53 cores.
We should keep this name. Maybe Xilinx provides a Zynq variant with
other cores in the future and for the Cortex-A53 we have
On 22.03.24 20:57, Gedare Bloom wrote:
In some other architectures we have had "generic" BSP targets. It
would be good to have something following the lp64 part. I'm not
quite clear on what the purpose of this generic BSP target is here.
For this platform, there is no need for having specific
On 22.03.24 16:10, Kinsey Moore wrote:
Putting these UART addresses in BSP options suggests that they're
user-configurable when they aren't. ZynqMP can use the ZYNQMP_UART0/1
from bsps/include/peripheral_maps/xilinx_zynqmp.h, but Zynq would need
its own peripheral map to reference.
This UART
