Update #4862.
---
bsp-howto/clock.rst | 34 ++
1 file changed, 22 insertions(+), 12 deletions(-)
diff --git a/bsp-howto/clock.rst b/bsp-howto/clock.rst
index 043083f..ed83472 100644
--- a/bsp-howto/clock.rst
+++ b/bsp-howto/clock.rst
@@ -139,6 +139,9 @@ Simple Time
Sebastian Huber (3):
dev/serial: Simplify some Zynq UART functions
dev/serial: Add ZYNQ_UART_[01]_BASE_ADDR
dev/serial: Add Zynq UART kernel I/O support
bsps/aarch64/xilinx-zynqmp/console/console.c | 58 +++
bsps/arm/xilinx-zynq/console/console-config.c | 49 ---
This helps to provide a shared implementation of the kernel I/O support.
---
bsps/aarch64/xilinx-zynqmp/console/console.c | 4 ++--
bsps/arm/xilinx-zynq/console/console-config.c | 5 +++--
.../console/console-config.c | 4 ++--
.../xilinx-zynqmp/console/console-config.c|
Replace the BSP_CONSOLE_MINOR BSP option for the Xilinx Zynq BSPs with the new
BSP option ZYNQ_UART_KERNEL_IO_BASE_ADDR. Move the kernel I/O support to a
shared file.
---
bsps/aarch64/xilinx-zynqmp/console/console.c | 41 ++
bsps/arm/xilinx-zynq/console/console-config.c | 50
Make the initialization and polled functions independent of the Termios
context. This helps to implement the kernel I/O support without a dependency
on the Termios framework.
---
bsps/aarch64/xilinx-zynqmp/console/console.c | 23 ---
bsps/arm/xilinx-zynq/console/debug-console.c | 15
---
cpukit/include/rtems/score/basedefs.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/cpukit/include/rtems/score/basedefs.h
b/cpukit/include/rtems/score/basedefs.h
index 4f28e6a525..010728d795 100644
--- a/cpukit/include/rtems/score/basedefs.h
+++ b/cpukit/inc
This patch looks good.
Kinsey
On Mon, Mar 18, 2024 at 11:30 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:
> ---
> spec/build/bsps/objxilinxsupportr5.yml | 3 +--
> spec/build/bsps/optxilsupportpath.yml | 2 +-
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git
This patch looks good.
Kinsey
On Mon, Mar 18, 2024 at 11:30 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:
> Add a BSP variant without a board-specific name.
> ---
> .../arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml | 87 +--
> .../bsps/arm/xilinx-zynqmp-rpu/bsprpu.
This patch looks good. I would suggest dropping the a53 from the BSP name
since all AArch64 ZynqMP BSPs will run on the A53 cores.
Kinsey
On Mon, Mar 18, 2024 at 11:30 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:
> Add a BSP variant without a board-specific name.
> ---
> .../
LGTM, thanks!
On Fri, Mar 22, 2024 at 1:11 AM Sebastian Huber
wrote:
>
> Update #4862.
> ---
> bsp-howto/clock.rst | 34 ++
> 1 file changed, 22 insertions(+), 12 deletions(-)
>
> diff --git a/bsp-howto/clock.rst b/bsp-howto/clock.rst
> index 043083f..ed83472 1006
ok
On Fri, Mar 22, 2024 at 3:32 AM Sebastian Huber
wrote:
>
> ---
> cpukit/include/rtems/score/basedefs.h | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/cpukit/include/rtems/score/basedefs.h
> b/cpukit/include/rtems/score/basedefs.h
> index 4f28e6a525..010
In some other architectures we have had "generic" BSP targets. It
would be good to have something following the lp64 part. I'm not
quite clear on what the purpose of this generic BSP target is here.
On Fri, Mar 22, 2024 at 9:48 AM Kinsey Moore wrote:
>
> This patch looks good. I would suggest dr
Makes the code in bsp/x86_64/amd64/start/start.S and the stack frame
setup by _CPU_Context_Initialize align the stack properly according to
what is expected by the x86-64 SysV ABI
---
bsps/x86_64/amd64/clock/eficlock.c| 28 ++-
bsps/x86_64/amd64/start/start.S
I kept getting a general protection fault whenever attempting to
execute the amd64 BSP while preparing for my GSOC proposal.
The GPF was being caused by an instruction attempting to move an SSE
register to an address on the stack not aligned to 16 bytes. After
some debugging I noticed that the cod
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