Re: [PATCH] sparc: Fix stack corruption

Hello Sebastian, I have reviewed the ticket and the patch. The fix is OK. -- Best regards, Martin Åberg Software Engineer Frontgrade Gaisler martin.ab...@gaisler.com Frontgrade Gaisler AB, Kungsgatan 12, SE-411 19 GÖTEBORG, Sweden. +46 (0) 31 775 8650, www.gaisler.com On 2023-09-20 09:38, S

Re: [PATCH] doxygen: Replace and move main page

Hello Joel, thanks for having a look at it. I used the features list here as a template for the mainpage: https://docs.rtems.org/branches/master/user/overview/index.html#features Maybe it needs to be updated as well. On 10.10.23 20:43, Joel Sherrill wrote: Sorry. Not sure how this kept slipp

Re: [PATCH] sparc: Fix stack corruption

On 12.10.23 11:59, Martin Åberg wrote: I have reviewed the ticket and the patch. The fix is OK. Thanks for the review, I checked it in. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax:

[PATCH v2 1/4] bsps/clock: Import Xilinx TTC hardware definitions

This imports the TTC hardware definitions for the triple timer counters on various Xilinx platforms. This was imported as specified in the VERSION file in this commit. --- bsps/include/dev/clock/VERSION | 24 bsps/include/dev/clock/xttcps_hw.h | 207 + 2 files

[PATCH v2 0/4] Add ZynqMP Cortex-R5 BSP

Changes from v1 (originally submitted by Philip Kirkpatrick): Refactoring: * import Xilinx code before modification * better use the existing Xilinx support code Other: * An additional patch to add cache support (also from Philip) has been integrated and refactored This has been tested on Xilinx

[PATCH v2 3/4] bsps/xil: Adjust Xilinx support code for Cortex-R5

This fixes some issues in the Xilinx support code that are critical to support the Cortex-R5F cores present in my Xilinx SoCs. The imported Cortex-R5 xil_cache.c matches the existing information in bsps/shared/xil/VERSION. --- bsps/include/xil/arm/ARMv8/32bit/xil_system.h | 37 ++

[PATCH v2 2/4] bsps/xil: Import Xilinx Cortex-R5 support

This imports Xilinx support code for the MPU and cache on Cortex-R5 cores. This was imported as specified in bsps/shared/xil/VERSION. --- bsps/include/xil/arm/cortexr5/xil_mpu.h | 117 + bsps/shared/xil/arm/cortexr5/xil_cache.c | 561 bsps/shared/xil/arm/cortexr5/xil_mpu.

[PATCH v2 4/4] bsps/arm: Add BSP for ZynqMP RPU

From: Philip Kirkpatrick --- .../console/console-config.c | 129 ++ bsps/arm/xilinx-zynqmp-rpu/include/bsp.h | 96 bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h | 65 + bsps/arm/xilinx-zynqmp-rpu/include/tm27.h | 54 + bsps/arm/xilinx-zynqmp-

[RSB PATCH 2/5] rtems/kernel: Update to latest

From: Chris Johns - libdl: fix TLS in base image - bsps/xnandpsu: fixes - cpukit/jffs2: avoid dead lock - bsps/imxrt: enable USB and fix PHY clock enable - bsps/stm32h7: update STM32 H7 HAL --- rtems/config/tools/rtems-kernel-6.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[RSB PATCH 1/5] rtems/tools: Update to latest

From: Chris Johns Minor fix in rtems-test --- rtems/config/tools/rtems-tools-6.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rtems/config/tools/rtems-tools-6.cfg b/rtems/config/tools/rtems-tools-6.cfg index 9632d5b..859c297 100644 --- a/rtems/config/tools/rtems-too

[RSB PATCH 4/5] rtems/net-services: Update to latest

From: Chris Johns - Updates for the RTEMS test changes --- rtems/config/net/net-services-1.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rtems/config/net/net-services-1.cfg b/rtems/config/net/net-services-1.cfg index bf1bdc8..cf17227 100644 --- a/rtems/config/net/n

[RSB PATCH 3/5] rtems/libbsd: Update to latest

From: Chris Johns - Pick up fixes to x86 (i368) bus space usage in kernel DMA --- rtems/config/tools/rtems-libbsd-6.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rtems/config/tools/rtems-libbsd-6.cfg b/rtems/config/tools/rtems-libbsd-6.cfg index c89b5eb..3bb1db7 10

[RSB PATCH 5/5] rtems/net-legacy: Update to latest

From: Chris Johns Pick up the test printer header change --- rtems/config/tools/rtems-net-legacy-6.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rtems/config/tools/rtems-net-legacy-6.cfg b/rtems/config/tools/rtems-net-legacy-6.cfg index 559ec01..d5ac842 100644 ---

[PATCH 2/2] cpukit: Remove unused includes

--- cpukit/libblock/src/bdbuf.c| 1 - cpukit/libcsupport/src/getpid.c| 1 - cpukit/libcsupport/src/getppid.c | 2 -- cpukit/libcsupport/src/isatty_r.c | 1 - cpukit/libcsupport/src/sup_fs_location.c | 1 - cpukit/posix/src/condti

[PATCH 1/2] bsps: Remove unused includes

--- bsps/aarch64/shared/cache/cache.c | 1 - bsps/shared/dev/i2c/cadence-i2c.c | 1 - bsps/shared/irq/irq-generic.c | 3 --- bsps/shared/start/bspgetworkarea-default.c | 1 - 4 files changed, 6 deletions(-) diff --git a/bsps/aarch64/shared/cache/cache.c b/bsps/aarc

Re: [PATCH 2/2] cpukit: Remove unused includes

Looks good, a nice cleanup. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte

Re: [RSB 1/3] 6/7: Update Newlib

On 10.10.23 07:57, Sebastian Huber wrote: On 09.10.23 23:52, Chris Johns wrote: Ok to all patches in the series. Thanks for newlib changes for ARM, they will be nice to use. I have to fix the riscv issue before we can update Newlib. I fixed the riscv issue and checked in an updated version o