Patch looks good except for one comment below.
On 9/6/2021 23:31, chr...@rtems.org wrote:
From: Chris Johns
- Remove the hard tester error and count the header errors.
---
tester/rt/config.py | 2 +-
tester/rt/report.py | 32 +++-
tester/rt/test.py | 7 +
Looks good to me.
On 9/6/2021 23:31, chr...@rtems.org wrote:
From: Chris Johns
- Fix data decoding
- Fix get MAC call
---
misc/tools/tftpproxy.py | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/misc/tools/tftpproxy.py b/misc/tools/tftpproxy.py
index c0aebb
Looks good to me.
On 9/6/2021 23:31, chr...@rtems.org wrote:
From: Chris Johns
- Limit the reopen to once a second
- Make sure the socket is closed when reopening
---
tester/rt/telnet.py | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/tester/rt/telnet.py b/tes
Looks good.
On 9/6/2021 23:31, chr...@rtems.org wrote:
From: Chris Johns
---
tester/rtems/testing/bsps/xilinx_zynqmp_lp64_zu3eg.ini | 1 +
1 file changed, 1 insertion(+)
diff --git a/tester/rtems/testing/bsps/xilinx_zynqmp_lp64_zu3eg.ini
b/tester/rtems/testing/bsps/xilinx_zynqmp_lp64_zu3e
Comment below.
On 9/6/2021 23:38, chr...@rtems.org wrote:
From: Chris Johns
- Only reset if the bootloader error is hardware related.
---
tester/rtems/testing/bsps/xilinx_zynqmp_ilp32_zu3eg.ini | 2 +-
tester/rtems/testing/bsps/xilinx_zynqmp_lp64_zu3eg.ini | 2 +-
2 files changed, 2 inser
Hi Zack,
https://devel.rtems.org/ticket/4503
The malloc implementation exists in the score as the Heap Manager. search
for "Heap_" within cpukit to get some ideas where to look.
@Joel are these two tickets duplicates?
https://devel.rtems.org/ticket/4503
https://devel.rtems.org/ticket/4271
-Geda
On Tue, Sep 7, 2021 at 6:17 PM Zacchaeus Leung wrote:
>
> ---
> cpukit/score/cpu/i386/cpu.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
> index 77b7a7161c..3c5b7db316 100644
> --- a/cpukit/score/cpu/i386/
I’ve just changed the optimization flags for rtems-tools, but I think I found
where to go to change that.
Using the Xilinx_zynq_a9_qemu BSP for example
* Go to bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
* Change the “-O2” value to the different optimization flag in the
CFLAGS_OPTI
Hi,
For this series of patches, I followed this series of steps:
1. Convert a file from the C way of doing things to C++
2. Go through all the files that had to do with the converted file and
make the formatting consistent.
Thanks,
Ryan
Ryan Long (10):
CoverageWriter: Convert to C++
covoar.
Got rid of C-strings, changed FILE pointer to ifstream.
---
tester/covoar/covoar.cc | 52 +++--
1 file changed, 24 insertions(+), 28 deletions(-)
diff --git a/tester/covoar/covoar.cc b/tester/covoar/covoar.cc
index f9d4814..746add1 100644
--- a/tester/c
---
tester/covoar/CoverageWriterBase.h| 4 +++-
tester/covoar/CoverageWriterRTEMS.cc | 26 +++---
tester/covoar/CoverageWriterRTEMS.h | 4 +++-
tester/covoar/CoverageWriterSkyeye.cc | 33 ++---
tester/covoar/CoverageWriterSkyeye.h | 4 +++-
---
tester/covoar/CoverageWriterBase.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tester/covoar/CoverageWriterBase.h
b/tester/covoar/CoverageWriterBase.h
index fca501a..ee8c148 100644
--- a/tester/covoar/CoverageWriterBase.h
+++ b/tester/covoar/CoverageWriterBase.h
---
tester/covoar/covoar.cc | 300 +++-
1 file changed, 167 insertions(+), 133 deletions(-)
diff --git a/tester/covoar/covoar.cc b/tester/covoar/covoar.cc
index 746add1..e8fb430 100644
--- a/tester/covoar/covoar.cc
+++ b/tester/covoar/covoar.cc
@@ -35,2
---
tester/covoar/CoverageWriterRTEMS.cc | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/tester/covoar/CoverageWriterRTEMS.cc
b/tester/covoar/CoverageWriterRTEMS.cc
index 3332cd4..d6c6ca3 100644
--- a/tester/covoar/CoverageWriterRTEMS.cc
+++ b/tester/
---
tester/covoar/CoverageWriterRTEMS.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tester/covoar/CoverageWriterRTEMS.h
b/tester/covoar/CoverageWriterRTEMS.h
index c760936..9110303 100644
--- a/tester/covoar/CoverageWriterRTEMS.h
+++ b/tester/covoar/CoverageWriterRTE
---
tester/covoar/CoverageWriterSkyeye.cc | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tester/covoar/CoverageWriterSkyeye.cc
b/tester/covoar/CoverageWriterSkyeye.cc
index 5225406..08aa609 100644
--- a/tester/covoar/CoverageWriterSkyeye.cc
+++ b/tester
---
tester/covoar/CoverageWriterSkyeye.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tester/covoar/CoverageWriterSkyeye.h
b/tester/covoar/CoverageWriterSkyeye.h
index 8f11959..5ef6432 100644
--- a/tester/covoar/CoverageWriterSkyeye.h
+++ b/tester/covoar/CoverageWrite
---
tester/covoar/CoverageWriterTSIM.cc | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/tester/covoar/CoverageWriterTSIM.cc
b/tester/covoar/CoverageWriterTSIM.cc
index bd15c9d..6c11b2b 100644
--- a/tester/covoar/CoverageWriterTSIM.cc
+++ b/tester/covo
---
tester/covoar/CoverageWriterTSIM.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tester/covoar/CoverageWriterTSIM.h
b/tester/covoar/CoverageWriterTSIM.h
index 5ae57f8..9325a6a 100644
--- a/tester/covoar/CoverageWriterTSIM.h
+++ b/tester/covoar/CoverageWriterTSIM.h
I've been looking into this but I don't see anywhere where a link-level private
address might be assigned. At one of my clients the RTEMS client (client
overload!, my client, DHCP client) gets a link-level private address e.g.
169.254.208.184. They insist that "libbsd" must be providing this a
On 08/09/2021 19:04, Peter Dufault wrote:
I've been looking into this but I don't see anywhere where a link-level private address
might be assigned. At one of my clients the RTEMS client (client overload!, my client,
DHCP client) gets a link-level private address e.g. 169.254.208.184. They in
Change license to BSD-2-Clause according to file histories and
documentation re-licensing agreement.
Update #3899.
Update #3993.
---
cpukit/include/rtems/rtems/cache.h | 688 ++---
1 file changed, 532 insertions(+), 156 deletions(-)
diff --git a/cpukit/include/rtems/rtems
Hi,
Unfortunately, there was no other reply to the request.
Easiest solution would be to exclude the STM32 code completely out of RTEMS
code for now. I can host it as example code in a personal repository.
But then I might have to change the architecture of the lwIP code again
which provided some
Hi, Robin,
Would it be possible to retain the STM32 code, but carve out the “contaminated”
lwIP code into a patch file. Then RTEMS code base remains “clean” and if I,
any user, chose to enable lwIP on STM32, I could do so by applying that patch.
I’d contaminate my src tree, but that’d be my r
On Wed, Sep 8, 2021 at 11:02 AM Gedare Bloom wrote:
> Hi Zack,
>
> https://devel.rtems.org/ticket/4503
>
> The malloc implementation exists in the score as the Heap Manager. search
> for "Heap_" within cpukit to get some ideas where to look.
>
I think the method is _Heap_Size_of_alloc_area. It m
On 8/9/21 11:09 pm, Kinsey Moore wrote:
> Comment below.
>
> On 9/6/2021 23:38, chr...@rtems.org wrote:
>> From: Chris Johns
>>
>> - Only reset if the bootloader error is hardware related.
>> ---
>> tester/rtems/testing/bsps/xilinx_zynqmp_ilp32_zu3eg.ini | 2 +-
>> tester/rtems/testing/bsps/xi
On 9/9/21 2:44 am, Ryan Long wrote:
> ---
> tester/covoar/CoverageWriterBase.h| 4 +++-
> tester/covoar/CoverageWriterRTEMS.cc | 26 +++---
> tester/covoar/CoverageWriterRTEMS.h | 4 +++-
> tester/covoar/CoverageWriterSkyeye.cc | 33 ++---
On 9/9/21 2:44 am, Ryan Long wrote:
> Got rid of C-strings, changed FILE pointer to ifstream.
> ---
> tester/covoar/covoar.cc | 52
> +++--
> 1 file changed, 24 insertions(+), 28 deletions(-)
>
> diff --git a/tester/covoar/covoar.cc b/tester/covoar/
On 9/9/21 2:44 am, Ryan Long wrote:
> ---
> tester/covoar/CoverageWriterRTEMS.cc | 23 +++
> 1 file changed, 11 insertions(+), 12 deletions(-)
>
> diff --git a/tester/covoar/CoverageWriterRTEMS.cc
> b/tester/covoar/CoverageWriterRTEMS.cc
> index 3332cd4..d6c6ca3 100644
> ---
On 2/9/21 3:36 am, Kinsey Moore wrote:
> On 9/1/2021 10:58, Sebastian Huber wrote:
>> On 01/09/2021 17:48, Sebastian Huber wrote:
>>> So, my proposal would be something like this:
>>>
>>> 1. Processor jumps to exception prologue
>>>
>>> 2. Exception prologue saves the context to CPU exception fra
diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
index 77b7a7161c..06af57418d 100644
--- a/cpukit/score/cpu/i386/cpu.c
+++ b/cpukit/score/cpu/i386/cpu.c
@@ -215,7 +215,7 @@ void _CPU_Exception_frame_print (const CPU_Exception_frame
*ctx)
{
unsigned int faultAddr = 0;
p
Thread ID is now a hex value part of ticket #4203
On Wed, 8 Sept 2021 at 23:58, Zacchaeus Leung
wrote:
> diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
> index 77b7a7161c..06af57418d 100644
> --- a/cpukit/score/cpu/i386/cpu.c
> +++ b/cpukit/score/cpu/i386/cpu.c
> @@ -21
>Thanks! I guess i'm really unsure about how the pointer relates to the
amount of memory that you can use. I assume the Malloc keeps track of the
sections being used in the heap. Does this function Allocate 2 blocks since
the pointer is set to
(uintptr_t) next_block + HEAP_ALLOC_BONUS - alloc_begi
33 matches
Mail list logo