On Wed, Jan 22, 2020 at 6:27 AM Niteesh wrote:
> On Wed, Jan 22, 2020 at 2:30 AM Christian Mauderer
> wrote:
>
>> Hello Niteesh,
>>
>> you had two different "v3" patches. Therefore I missed this one. I
>> thought there was still a review comment from Gedare pending (which he
>> added at the v2 p
On 23/01/2020 14:41, Niteesh wrote:
> > +Raspberry Pi's.
>
> I have to be honest: I'm not sure here. As far as I know the
> apostroph
> (') is a sign that you left something out. I'm not sure whether
> there
> are cases in English where you use it ot
The GICv3 implementation uses the GICD_ITARGETSR register to configure
interrupt affinity. The GIC uses this register only when affinity
routing is disabled, which is called legacy operation mode. However,
affinity routing is being enabled, by setting the ARE_NS bit in the
GICD_CTLR register; there
Rename the xen_virtual target to xen_gicv2, to reflect that this target
is using the GICv2 interrupt controller driver. A RTEMS virtual machine
may be required to use a different interrupt controller driver,
depending on the underlying platform.
---
bsps/arm/xen/config/{xen_virtual.cfg => xen_gicv
Implement the xen_gicv3 target that uses the GICv3 interrupt controller
driver. This is required for platforms where the underlying processor is
using GICv3 with no legacy operation support.
---
bsps/arm/xen/config/xen_gicv3.cfg | 14 ++
bsps/arm/xen/include/bsp.h| 10 +
This patch set renames the "xen_virtual" target to "xen_gicv2", and adds a new
"xen_gicv3" target that uses the GICv3 driver. This is the only hardware
dependency I have identified that a RTEMS virtual machine has with Xen on ARMv8.
The "xen_gicv3" target has been confirmed to work with Xen and AR
