[PATCH rtems-littelvgl] Allow to build without drivers.

2019-11-05 Thread Christian Mauderer
This is for example usefull if you want to build without libbsd. --- lvgl.py | 8 +--- wscript | 7 +++ 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/lvgl.py b/lvgl.py index 6d83c63..5452ed0 100644 --- a/lvgl.py +++ b/lvgl.py @@ -30,7 +30,7 @@ import os import re import

[PATCH] heap: Simplify _Heap_Block_allocate()

2019-11-05 Thread Sebastian Huber
Determine the next block only once and use it throughout. --- cpukit/score/src/heap.c | 48 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/cpukit/score/src/heap.c b/cpukit/score/src/heap.c index a67fef783a..b54bb98cff 100644 --- a/c

Support for AXI interconnect targetting the XILINX ZC706

2019-11-05 Thread Tiago Manuel Da Silva Jorge
Dear devel members, We are working on an interesting project where we are developing applications that should run with RTEMS on ARM and additionally communicate with Programmable Logic (FPGA). We are using the Xilinx Zynq-7000 SoC ZC706 Evaluation Kit, and for communication between its PS (Proc

Re: Support for AXI interconnect targetting the XILINX ZC706

2019-11-05 Thread Chris Johns
On 5/11/19 11:43 pm, Tiago Manuel Da Silva Jorge wrote: > We are working on an interesting project where we are developing applications > that should run with RTEMS on ARM and additionally communicate with > Programmable > Logic (FPGA). We are using the Xilinx Zynq-7000 SoC ZC706 Evaluation Kit, a

Re: [PATCH rtems-littelvgl] Allow to build without drivers.

2019-11-05 Thread Chris Johns
On 5/11/19 10:56 pm, Christian Mauderer wrote: > This is for example usefull if you want to build without libbsd. Ok to push. Thanks Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

RE: Support for AXI interconnect targetting the XILINX ZC706

2019-11-05 Thread Misra, Avinash
Chris, This is an excellent response and this is information that I certainly wish I had when I started using RTEMS for my Zynq application. Tiago, another "gotcha" I want to point out is when launching your target application via Xilinx SDK and using RTEMS with SMP Mode (setting # of process

Re: Support for AXI interconnect targetting the XILINX ZC706

2019-11-05 Thread Chris Johns
On 6/11/19 10:51 am, Misra, Avinash wrote: > Tiago, another "gotcha" I want to point out is when launching your target > application via Xilinx SDK and using RTEMS with SMP Mode (setting # of > processors > 1). When you program and launch your application to CPU0 on the > Zynq via Xilinx SDK, Xi

Re: [PATCH rtems-littelvgl] Allow to build without drivers.

2019-11-05 Thread Christian Mauderer
On 06/11/2019 00:35, Chris Johns wrote: > On 5/11/19 10:56 pm, Christian Mauderer wrote: >> This is for example usefull if you want to build without libbsd. > > Ok to push. > > Thanks > Chris > Thanks. Pushed it. -- embedded brains GmbH Herr Christ