RTEMS had the configuration option CONFIGURE_HAS_OWN_MOUNT_TABLE since
1999. This configuration option was broken since RTEMS 4.11. Remove
this broken configuration option.
Update #3488.
---
cpukit/include/rtems/confdefs.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
This configuration was untested and undocumented. Remove it to avoid a
potential exposure of internal data structures to the application
domain.
Close #3520.
---
cpukit/include/rtems/confdefs.h | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/cpukit/include/rtems/confdef
Close #3488.
---
c-user/configuring_a_system.rst | 40 +++-
1 file changed, 7 insertions(+), 33 deletions(-)
diff --git a/c-user/configuring_a_system.rst b/c-user/configuring_a_system.rst
index f35d2bb..7697694 100644
--- a/c-user/configuring_a_system.rst
+++ b
The RTEMS configuration should be done via explicit configuration
options to allow more freedom for implementation changes.
Update #3489.
Update #3490.
---
cpukit/include/rtems/confdefs.h | 370
1 file changed, 186 insertions(+), 184 deletions(-)
diff --g
Close #3489.
Close #3490.
---
c-user/configuring_a_system.rst | 33 +++--
1 file changed, 7 insertions(+), 26 deletions(-)
diff --git a/c-user/configuring_a_system.rst b/c-user/configuring_a_system.rst
index 7697694..3e44239 100644
--- a/c-user/configuring_a_system.rst
Spike simulator and QEMU's spike_v1.10 don't have a PLIC
---
bsps/riscv/riscv/irq/irq.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index 1a76846..3c35a37 100644
--- a/bsps/riscv/riscv/irq/irq.c
+++ b/bsps/riscv/riscv/irq/irq.c
@
Thanks, committed.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
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How does this get enabled? Is it supposed to be tripped by some bsp
variant?
Where is any documentation on it?
Right now, it looks like hidden magic.
--joel
On Mon, Sep 17, 2018, 7:12 AM Hesham Almatary
wrote:
> Spike simulator and QEMU's spike_v1.10 don't have a PLIC
> ---
> bsps/riscv/risc
On 17/09/2018 14:24, Joel Sherrill wrote:
How does this get enabled? Is it supposed to be tripped by some bsp
variant?
Where is any documentation on it?
Right now, it looks like hidden magic.
https://docs.rtems.org/branches/master/user/bsps/bsps-riscv.html#build-configuration-options
--
Seb