From: Pavel Pisa
The series implements Raspberry Pi 2 (BCM2836) SMP support.
The first two patches modify ARM Cortex-A common CP15 support
to expose clean by level cache operations to the BSP code.
Clean and invalidation of L1 cache is required when the secondary
CPU is booted. But the secondary
From: Pavel Pisa
The change documents meaning of codes and opens
well defined way to use cache type format for cache
examination/debugging outside of arm-cp15.h file.
---
c/src/lib/libcpu/arm/shared/include/arm-cp15.h | 39 --
1 file changed, 30 insertions(+), 9 deletions
From: Rohini Kulkarni
---
.../libbsp/arm/raspberrypi/include/raspberrypi.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
index 911b86b..4cedc4c 100644
From: Pavel Pisa
---
c/src/lib/libbsp/arm/raspberrypi/Makefile.am | 2 --
c/src/lib/libbsp/arm/raspberrypi/configure.ac | 5 +++--
c/src/lib/libbsp/arm/raspberrypi/startup/{linkcmds => linkcmds.in} | 0
3 files changed, 3 insertions(+), 4 deletions(-)
From: Pavel Pisa
---
c/src/lib/libbsp/arm/raspberrypi/include/irq.h | 5 +
c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h | 18 +++---
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/irq.h
b/c/src/lib/libb
From: Pavel Pisa
---
c/src/lib/libbsp/arm/raspberrypi/configure.ac| 14 ++
c/src/lib/libbsp/arm/raspberrypi/startup/linkcmds.in | 2 ++
2 files changed, 16 insertions(+)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/configure.ac
b/c/src/lib/libbsp/arm/raspberrypi/configure
From: Pavel Pisa
Protection by rtems_interrupt_disable() is incompatible with SMP build.
Actual page table entries manipulation function does not need locking
and disabling cache and can be run concurrently even on multiple
CPUs as long as changes do not modify same region. If the function
is cal
From: Pavel Pisa
---
.../libbsp/arm/raspberrypi/include/raspberrypi.h | 142 -
1 file changed, 140 insertions(+), 2 deletions(-)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
index 4cedc4c..2f4
From: Pavel Pisa
New function arm_cp15_cache_invalidate_level and arm_cp15_cache_clean_level
can be used to maintain single cache level (instruction or data).
---
c/src/lib/libcpu/arm/shared/include/arm-cp15.h | 108 ++---
1 file changed, 60 insertions(+), 48 deletions(-)
di
From: Pavel Pisa
It has advantage that it is designed as free-running counter
with compare registers and can easily serve for for both
timecounter and tick interrupt.
---
c/src/lib/libbsp/arm/raspberrypi/clock/clockdrv.c | 98 ++-
1 file changed, 62 insertions(+), 36 deletion
From: Pavel Pisa
---
c/src/lib/libbsp/arm/raspberrypi/Makefile.am | 3 +
c/src/lib/libbsp/arm/raspberrypi/include/bsp.h | 3 +
c/src/lib/libbsp/arm/raspberrypi/irq/irq.c | 18 +++
c/src/lib/libbsp/arm/raspberrypi/startup/bspsmp.c | 122 +
.../libbsp/ar
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