Hello Chrisn,
thanks for commiting. Have you tested code on Zynq in SMP RTEMS build?
I have tested only on Zynq UP for now.
I have run test to document which cache levels are maintained
by CP15 by different ARM chips. I print only data and unified
ones ones because it is enough for levels and sha
On 01/09/2016 19:49, Pavel Pisa wrote:
thanks for commiting. Have you tested code on Zynq in SMP RTEMS build?
Yes I have tested it with SMP running a few of the SMP tests loaded
using a recent u-boot. I have also built a major app and run that, but
that is not loaded using u-boot, it uses a
