Try the perf command. It will give you the load and performance per core. Sis
is fairly accurate for basic benchmarking ...-- Ursprungligt
meddelande--Från: Đức AnhDatum: mån 14 juni 2021 10:54Till: Jiri
Gaisler;Kopia: rtems-de...@rtems.org;Ämne:Re: Running SPARC/LEON3 in TSIM-LEON3
sim
Hi Jiri,
Thanks for the suggestion. It works. However, it looks like it just
simulates the instruction. I am looking for a cycle-accurate simulator and
can provide the performance information on each core. Do you know any?
Best,
Duc Anh
On Fri, 11 Jun 2021 at 22:10, Jiri Gaisler wrote:
>
> On
On 6/11/21 12:37 PM, Đức Anh wrote:
Hi Sebastian,
Thank you. I didn't notice that.
I recompile with SMP enabled, and the application doesn't run successfully in
the TSIM-LEON3 simulator. Below is the error message:
Initializing and starting from 0x4000
CPU 0 in error mode (tt=
Hi Sebastian,
Thank you. I didn't notice that.
I recompile with SMP enabled, and the application doesn't run successfully
in the TSIM-LEON3 simulator. Below is the error message:
Initializing and starting from 0x4000
>
> CPU 0 in error mode (tt=0x80, trap instruction)
> (In trap table fo
On 09/06/2021 18:39, Đức Anh wrote:
- Is there a way to enable SMP for SPARC/LEON3 in RTEMS 6?
Just set "RTEMS_SMP = True" in your config.ini:
https://docs.rtems.org/branches/master/user/bld/index.html#migration-from-autoconf-automake
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
Hi all,
I am trying to run my RTEMS application in the TSIM-LEON3 simulator. It
works fine with RTEMS version 6 (master branch) but it is not when I build
with RTEMS version 5.1 (branch 5). The reason why I revert back to version
5 because I want to use the SMP feature of RTEMS, and I haven't seen
