Re: SMP Testing of RISC-V

2019-05-21 Thread Sebastian Huber
On 21/05/2019 16:26, Joel Sherrill wrote: On Mon, May 20, 2019 at 11:23 PM Sebastian Huber > wrote: On 20/05/2019 20:23, Joel Sherrill wrote: > Hi > > I can't seem to find the number of cores the RISC-V port has been tested >

Re: SMP Testing of RISC-V

2019-05-21 Thread Joel Sherrill
On Mon, May 20, 2019 at 11:23 PM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 20/05/2019 20:23, Joel Sherrill wrote: > > Hi > > > > I can't seem to find the number of cores the RISC-V port has been tested > > on. I couldn't even find test results for riscv RTEMS in the archive

Re: SMP Testing of RISC-V

2019-05-20 Thread Sebastian Huber
On 20/05/2019 20:23, Joel Sherrill wrote: Hi I can't seem to find the number of cores the RISC-V port has been tested on. I couldn't even find test results for riscv RTEMS in the archives. Info appreciated. I tested with up to two cores and mostly using a 64-bit target. It should work on up