On Fri, Aug 2, 2019 at 10:44 PM Gedare Bloom wrote:
> Seems you will need 2 more spike to cover the suggestion 32/64 and
> HW/SW FP?
Yes, moreover I will need good amount of guidance too.
> i also recommend you try the sis variant, for a bit more
> coverage.
>
Okay, I will do that.
For now I w
Seems you will need 2 more spike to cover the suggestion 32/64 and
HW/SW FP? i also recommend you try the sis variant, for a bit more
coverage.
On Fri, Aug 2, 2019 at 10:27 AM Vaibhav Gupta wrote:
>
> Thanks a lot.
> Then I will be working with "rv32imac" and "rv64imac"
>
> Vaibhav Gupta
>
> On
Thanks a lot.
Then I will be working with "rv32imac" and "rv64imac"
Vaibhav Gupta
On Fri, Aug 2, 2019 at 1:33 PM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:
> On 02/08/2019 09:50, Vaibhav Gupta wrote:
> > Hello,
> > I was about to test the testsuite code, need to confirm
> > on
On 02/08/2019 09:50, Vaibhav Gupta wrote:
Hello,
I was about to test the testsuite code, need to confirm
on which RISCV BSP we are going to work?
For example, for ARM I was asked for xilinx-zynq
So is there any specific one for riscv too, or should I build any of it?
While you work on this, pl
