thread dispatch occurs due to an interrupt. if interrupts are
disabled, then no dispatch.
On Wed, Aug 12, 2015 at 2:23 PM, Saurabh Gadia wrote:
> Hi,
>
> #define _ISR_Disable( _level ) \
> do { \
> _CPU_ISR_Disable( _level ); \
> _Assert( _Debug_Is_owner_of_giant() ); \
> RTEMS_COMP
Hi,
#define _ISR_Disable( _level ) \
do { \
_CPU_ISR_Disable( _level ); \
_Assert( _Debug_Is_owner_of_giant() ); \
RTEMS_COMPILER_MEMORY_BARRIER(); \
} while (0)
the above macro has description:
@brief Disables interrupts on this processor.
*
* This macro disables all interrup
On Wed, Aug 12, 2015 at 11:48 AM, Saurabh Gadia wrote:
> Hi,
>
> For operations related to manipulation of Chain_Node we have two modes for
> that: protected and unprotected. In protected access to chain we guard the
> operation by disabling the interrupts while in unprotected we don't guard
> it.
