Re: [PATCH-V2 1/1] sparc: Fix context switch on SMP

2015-11-16 Thread Daniel Cederman
Ok, then I will remove that line. I like the assert idea and will add that to the patch. Thank you for your comments and help! On 2015-11-16 13:52, Sebastian Huber wrote: On 16/11/15 13:14, Daniel Cederman wrote: I was unsure if the ET bit was always set or not for newly created task contexts,

Re: [PATCH-V2 1/1] sparc: Fix context switch on SMP

2015-11-16 Thread Sebastian Huber
On 16/11/15 13:14, Daniel Cederman wrote: I was unsure if the ET bit was always set or not for newly created task contexts, or if this was the first place that traps got enabled for a new task. If it is always set we can remove that instruction. The PSR is initialized like this (_CPU_Context_I

Re: [PATCH-V2 1/1] sparc: Fix context switch on SMP

2015-11-16 Thread Daniel Cederman
I was unsure if the ET bit was always set or not for newly created task contexts, or if this was the first place that traps got enabled for a new task. If it is always set we can remove that instruction. On 2015-11-16 11:27, Sebastian Huber wrote: On 16/11/15 11:06, Daniel Cederman wrote: @

Re: [PATCH-V2 1/1] sparc: Fix context switch on SMP

2015-11-16 Thread Sebastian Huber
On 16/11/15 11:06, Daniel Cederman wrote: @@ -202,6 +193,13 @@ try_update_is_executing: ! The next load is in a delay slot, which is all right #endif +ld [%o1 + PSR_OFFSET], %g1 ! g1 = heir psr +andn%g1, SPARC_PSR_CWP_MASK, %g1 ! g1 = heir psr w/o