Re: Question regarding ARMV7M FPU context switch and ISRs

2024-02-08 Thread Chris Johns
Sorry as I sent this I could see the subject and 7M. Chris On 9/2/2024 1:33 pm, Chris Johns wrote: > On 8/2/2024 9:55 pm, Sebastian Huber wrote: >> On 08.02.24 11:43, Cedric Berger wrote: >>> On 08.02.2024 11:09, Sebastian Huber wrote: On 08.02.24 10:53, Cedric Berger wrote: > > This

Re: Question regarding ARMV7M FPU context switch and ISRs

2024-02-08 Thread Chris Johns
On 8/2/2024 9:55 pm, Sebastian Huber wrote: > On 08.02.24 11:43, Cedric Berger wrote: >> On 08.02.2024 11:09, Sebastian Huber wrote: >>> On 08.02.24 10:53, Cedric Berger wrote: This would also simplify the context switching code, by centralizing of the saving of the FPU context in RT

Re: Question regarding ARMV7M FPU context switch and ISRs

2024-02-08 Thread Sebastian Huber
On 08.02.24 11:43, Cedric Berger wrote: Hello Sebastian, On 08.02.2024 11:09, Sebastian Huber wrote: Hello Cedric, On 08.02.24 10:53, Cedric Berger wrote: Hello, I've a question: does RTEMS really wants to support FPU operations in ISRs? Because if the answer is "no", then I believe tha

Re: Question regarding ARMV7M FPU context switch and ISRs

2024-02-08 Thread Cedric Berger
Hello Sebastian, On 08.02.2024 11:09, Sebastian Huber wrote: Hello Cedric, On 08.02.24 10:53, Cedric Berger wrote: Hello, I've a question: does RTEMS really wants to support FPU operations in ISRs? Because if the answer is "no", then I believe that we could simplify the RTEMS code (and fo

Re: Question regarding ARMV7M FPU context switch and ISRs

2024-02-08 Thread Sebastian Huber
Hello Cedric, On 08.02.24 10:53, Cedric Berger wrote: Hello, I've a question: does RTEMS really wants to support FPU operations in ISRs? Because if the answer is "no", then I believe that we could simplify the RTEMS code (and for me the mental model of the whole thing) by running the FPU wit

Question regarding ARMV7M FPU context switch and ISRs

2024-02-08 Thread Cedric Berger
Hello, I've a question: does RTEMS really wants to support FPU operations in ISRs? Because if the answer is "no", then I believe that we could simplify the RTEMS code (and for me the mental model of the whole thing) by running the FPU with both FPCCR.ASPEN and FPCCR.LSPEN = 0. This mean that