On Tue, Jul 29, 2014 at 3:18 AM, Gedare Bloom wrote:
>
>
>
> On Mon, Jul 28, 2014 at 1:20 PM, Hesham Moustafa
> wrote:
>>
>> Hi,
>>
>> I have read about MMU and Caches in OpenRISC to start implementing
>> related managers in the new or1k port. Before beginning to write the
>> code, I would like t
On Mon, Jul 28, 2014 at 1:20 PM, Hesham Moustafa
wrote:
> Hi,
>
> I have read about MMU and Caches in OpenRISC to start implementing
> related managers in the new or1k port. Before beginning to write the
> code, I would like to introduce some of the architecture details
> regarding MMU and Caches
Hi,
I have read about MMU and Caches in OpenRISC to start implementing
related managers in the new or1k port. Before beginning to write the
code, I would like to introduce some of the architecture details
regarding MMU and Caches.
There are both; data and instruction MMU, TLBs, Caches.
First, pag